Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44498 )
Change subject: nb/amd/agesa: define DDR3_SPD_SIZE as a common value ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44498/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/44498/1//COMMIT_MSG@9 PS1, Line 9: Move a size of DDR3 SPD memory (always 256 bytes) to a common define.
Other instances of `256` are outside nb/amd/agesa, i.e.: […]
If there's a decent enough AGESA header where you could add this definition, I'd add it in vendorcode. If that's too complex, you can always add it as a Kconfig symbol.