[coreboot-gerrit] Change in coreboot[master]: soc/amd/common: Allow the SPI base to be set for psp_verstage

[Martin Roth (Code Review)]

Hello build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/43307

to look at the new patch set (#2).

Change subject: soc/amd/common: Allow the SPI base to be set for psp_verstage
......................................................................

soc/amd/common: Allow the SPI base to be set for psp_verstage

The PSP maps the devices into it's memory in a different fashion, so
we need to be able to use a value other than the standard x86 address.

BUG=b:159811539
TEST=Build with following patch to set the SPI speed in psp_verstage.

Signed-off-by: Martin Roth 
Change-Id: I50d9de269bcb88fbf510056a6216e22a050cae6b
---
M src/soc/amd/common/block/include/amdblocks/spi.h
M src/soc/amd/common/block/spi/fch_spi.c
2 files changed, 15 insertions(+), 5 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/43307/2