Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45670 )
Change subject: [DO NOT MERGE] {soc,mb}/intel/dehydratedlake: Add empty SoC/mainboard ......................................................................
[DO NOT MERGE] {soc,mb}/intel/dehydratedlake: Add empty SoC/mainboard
This lake got dried up. It contains a fraction of the code in other SoCs and is meant to be used as a base when adding support for new SoCs. It could be slimmed down even further, but this should be good enough.
Change-Id: I5b1387b2826a7cad98c40d67cdc476c5d77ce0fd Signed-off-by: Angel Pons th3fanbus@gmail.com --- A src/mainboard/intel/dehydratedlake_rvp/Kconfig A src/mainboard/intel/dehydratedlake_rvp/Kconfig.name A src/mainboard/intel/dehydratedlake_rvp/board_info.txt A src/mainboard/intel/dehydratedlake_rvp/devicetree.cb A src/mainboard/intel/dehydratedlake_rvp/dsdt.asl A src/soc/intel/dehydratedlake/Kconfig A src/soc/intel/dehydratedlake/Makefile.inc A src/soc/intel/dehydratedlake/acpi.c A src/soc/intel/dehydratedlake/bootblock/bootblock.c A src/soc/intel/dehydratedlake/chip.c A src/soc/intel/dehydratedlake/chip.h A src/soc/intel/dehydratedlake/espi.c A src/soc/intel/dehydratedlake/fsp_params.c A src/soc/intel/dehydratedlake/gpio.c A src/soc/intel/dehydratedlake/i2c.c A src/soc/intel/dehydratedlake/include/soc/cpu.h A src/soc/intel/dehydratedlake/include/soc/gpe.h A src/soc/intel/dehydratedlake/include/soc/gpio.h A src/soc/intel/dehydratedlake/include/soc/gpio_defs.h A src/soc/intel/dehydratedlake/include/soc/gpio_soc_defs.h A src/soc/intel/dehydratedlake/include/soc/iomap.h A src/soc/intel/dehydratedlake/include/soc/irq.h A src/soc/intel/dehydratedlake/include/soc/itss.h A src/soc/intel/dehydratedlake/include/soc/me.h A src/soc/intel/dehydratedlake/include/soc/nvs.h A src/soc/intel/dehydratedlake/include/soc/p2sb.h A src/soc/intel/dehydratedlake/include/soc/pci_devs.h A src/soc/intel/dehydratedlake/include/soc/pcr_ids.h A src/soc/intel/dehydratedlake/include/soc/pm.h A src/soc/intel/dehydratedlake/include/soc/pmc.h A src/soc/intel/dehydratedlake/include/soc/ramstage.h A src/soc/intel/dehydratedlake/include/soc/smbus.h A src/soc/intel/dehydratedlake/include/soc/soc_chip.h A src/soc/intel/dehydratedlake/include/soc/systemagent.h A src/soc/intel/dehydratedlake/lockdown.c A src/soc/intel/dehydratedlake/p2sb.c A src/soc/intel/dehydratedlake/pmc.c A src/soc/intel/dehydratedlake/pmutil.c A src/soc/intel/dehydratedlake/reset.c A src/soc/intel/dehydratedlake/romstage/Makefile.inc A src/soc/intel/dehydratedlake/romstage/romstage.c A src/soc/intel/dehydratedlake/smihandler.c A src/soc/intel/dehydratedlake/smmrelocate.c A src/soc/intel/dehydratedlake/spi.c 44 files changed, 874 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/45670/1
diff --git a/src/mainboard/intel/dehydratedlake_rvp/Kconfig b/src/mainboard/intel/dehydratedlake_rvp/Kconfig new file mode 100644 index 0000000..bab01c9 --- /dev/null +++ b/src/mainboard/intel/dehydratedlake_rvp/Kconfig @@ -0,0 +1,29 @@ +if BOARD_INTEL_DEHYDRATEDLAKE_RVP + +config BOARD_SPECIFIC_OPTIONS + def_bool y + select BOARD_ROMSIZE_KB_16384 + select HAVE_ACPI_RESUME + select HAVE_ACPI_TABLES + select SOC_INTEL_DEHYDRATEDLAKE + +config MAINBOARD_DIR + string + default "intel/dehydratedlake_rvp" + +config MAINBOARD_PART_NUMBER + string + default "Dehydrated Lake RVP" + +config MAINBOARD_FAMILY + string + default "Intel_dehydratedlake_rvp" + +config MAX_CPUS + int + default 8 + +config DIMM_SPD_SIZE + int + default 512 +endif diff --git a/src/mainboard/intel/dehydratedlake_rvp/Kconfig.name b/src/mainboard/intel/dehydratedlake_rvp/Kconfig.name new file mode 100644 index 0000000..b2ece12 --- /dev/null +++ b/src/mainboard/intel/dehydratedlake_rvp/Kconfig.name @@ -0,0 +1,2 @@ +config BOARD_INTEL_DEHYDRATEDLAKE_RVP + bool "Dehydrated Lake RVP" diff --git a/src/mainboard/intel/dehydratedlake_rvp/board_info.txt b/src/mainboard/intel/dehydratedlake_rvp/board_info.txt new file mode 100644 index 0000000..3be4e3e --- /dev/null +++ b/src/mainboard/intel/dehydratedlake_rvp/board_info.txt @@ -0,0 +1,6 @@ +Vendor name: Intel +Board name: Dehydrated Lake RVP +Category: eval +ROM protocol: SPI +ROM socketed: n +Flashrom support: n diff --git a/src/mainboard/intel/dehydratedlake_rvp/devicetree.cb b/src/mainboard/intel/dehydratedlake_rvp/devicetree.cb new file mode 100644 index 0000000..44c02ff --- /dev/null +++ b/src/mainboard/intel/dehydratedlake_rvp/devicetree.cb @@ -0,0 +1,10 @@ +chip soc/intel/dehydratedlake + + device cpu_cluster 0 on + device lapic 0 on end + end + + device domain 0 on + device pci 00.0 on end # Host Bridge + end +end diff --git a/src/mainboard/intel/dehydratedlake_rvp/dsdt.asl b/src/mainboard/intel/dehydratedlake_rvp/dsdt.asl new file mode 100644 index 0000000..8bb2332 --- /dev/null +++ b/src/mainboard/intel/dehydratedlake_rvp/dsdt.asl @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <acpi/acpi.h> + +DefinitionBlock( + "dsdt.aml", + "DSDT", + 0x02, // DSDT revision: ACPI v2.0 and up + OEM_ID, + ACPI_TABLE_CREATOR, + 0x20110725 // OEM revision +) +{ + // global NVS and variables + #include <soc/intel/common/block/acpi/acpi/globalnvs.asl> + + #include <southbridge/intel/common/acpi/sleepstates.asl> +} diff --git a/src/soc/intel/dehydratedlake/Kconfig b/src/soc/intel/dehydratedlake/Kconfig new file mode 100644 index 0000000..cad5286 --- /dev/null +++ b/src/soc/intel/dehydratedlake/Kconfig @@ -0,0 +1,119 @@ +config SOC_INTEL_DEHYDRATEDLAKE + bool + help + Intel Dehydrated Lake support + +if SOC_INTEL_DEHYDRATEDLAKE + +config CPU_SPECIFIC_OPTIONS + def_bool y + select ACPI_INTEL_HARDWARE_SLEEP_VALUES + select ARCH_BOOTBLOCK_X86_32 + select ARCH_RAMSTAGE_X86_32 + select ARCH_ROMSTAGE_X86_32 + select ARCH_VERSTAGE_X86_32 + select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH + select BOOT_DEVICE_SUPPORTS_WRITES + select CACHE_MRC_SETTINGS + select CPU_INTEL_FIRMWARE_INTERFACE_TABLE + select FSP_M_XIP + select GENERIC_GPIO_LIB + select HAVE_FSP_GOP + select HAVE_INTEL_FSP_REPO + select INTEL_DESCRIPTOR_MODE_CAPABLE + select HAVE_SMI_HANDLER + select IDT_IN_EVERY_STAGE + select INTEL_GMA_ACPI + select INTEL_GMA_ADD_VBT if RUN_FSP_GOP + select IOAPIC + select MRC_SETTINGS_PROTECT + select PARALLEL_MP + select PARALLEL_MP_AP_WORK + select MICROCODE_BLOB_UNDISCLOSED + select PLATFORM_USES_FSP2_1 + select FSP_PEIM_TO_PEIM_INTERFACE + select REG_SCRIPT + select PMC_GLOBAL_RESET_ENABLE_LOCK + select CPU_INTEL_COMMON_SMM + select SOC_INTEL_COMMON + select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE + select SOC_INTEL_COMMON_BLOCK + select SOC_INTEL_COMMON_BLOCK_ACPI + select SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG + select SOC_INTEL_COMMON_BLOCK_CPU + select SOC_INTEL_COMMON_BLOCK_CPU_MPINIT + select SOC_INTEL_COMMON_BLOCK_HDA + select SOC_INTEL_COMMON_BLOCK_SA + select SOC_INTEL_COMMON_BLOCK_SMM + select SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP + select SOC_INTEL_COMMON_BLOCK_THERMAL + select SOC_INTEL_COMMON_PCH_BASE + select SOC_INTEL_COMMON_RESET + select SOC_INTEL_COMMON_BLOCK_CAR + select SSE2 + select SUPPORT_CPU_UCODE_IN_CBFS + select TSC_MONOTONIC_TIMER + select UDELAY_TSC + select UDK_2017_BINDING + select DISPLAY_FSP_VERSION_INFO + select HECI_DISABLE_USING_SMM + select USE_INTEL_FSP_TO_CALL_COREBOOT_PUBLISH_MP_PPI + select USE_CAR_NEM_ENHANCED_V1 + +config DCACHE_RAM_BASE + default 0xdead0000 + +config DCACHE_RAM_SIZE + default 0x8000 + +config DCACHE_BSP_STACK_SIZE + hex + default 0x4000 + +config MAX_ROOT_PORTS + int + default 1 + +config SMM_TSEG_SIZE + hex + default 0x800000 + +config PCR_BASE_ADDRESS + hex + default 0xdeadbeef + help + This option allows you to select MMIO Base Address of sideband bus. + +config MMCONF_BASE_ADDRESS + hex + default 0xdeadbeef + +config DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ + int + default 133 + +config FSP_HEADER_PATH + default "3rdparty/fsp/IceLakeFspBinPkg/Include" + +config FSP_FD_PATH + default "3rdparty/fsp/IceLakeFspBinPkg/Fsp.fd" + +config CONSOLE_UART_BASE_ADDRESS + hex + default 0xfe032000 + depends on INTEL_LPSS_UART_FOR_CONSOLE + +# Clock divider parameters for 115200 baud rate +config SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL + hex + default 0x30 + +config SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL + hex + default 0xc35 + +config C_ENV_BOOTBLOCK_SIZE + hex + default 0x4000 + +endif diff --git a/src/soc/intel/dehydratedlake/Makefile.inc b/src/soc/intel/dehydratedlake/Makefile.inc new file mode 100644 index 0000000..be8b70e --- /dev/null +++ b/src/soc/intel/dehydratedlake/Makefile.inc @@ -0,0 +1,44 @@ +ifeq ($(CONFIG_SOC_INTEL_DEHYDRATEDLAKE),y) + +subdirs-y += romstage +subdirs-y += ../../../cpu/intel/microcode +subdirs-y += ../../../cpu/intel/turbo +subdirs-y += ../../../cpu/x86/lapic +subdirs-y += ../../../cpu/x86/mtrr +subdirs-y += ../../../cpu/x86/smm +subdirs-y += ../../../cpu/x86/tsc + +# all (bootblock, verstage, romstage, postcar, ramstage) +all-y += i2c.c +all-y += pmutil.c + +bootblock-y += bootblock/bootblock.c +bootblock-y += espi.c +bootblock-y += gpio.c +bootblock-y += p2sb.c + +romstage-y += espi.c +romstage-y += gpio.c +romstage-y += reset.c + +ramstage-y += acpi.c +ramstage-y += chip.c +ramstage-y += espi.c +ramstage-y += fsp_params.c +ramstage-y += gpio.c +ramstage-y += lockdown.c +ramstage-y += p2sb.c +ramstage-y += pmc.c +ramstage-y += reset.c +ramstage-y += smmrelocate.c +ramstage-y += spi.c + +smm-y += gpio.c +smm-y += p2sb.c +smm-y += pmc.c +smm-y += pmutil.c +smm-y += smihandler.c + +CPPFLAGS_common += -I$(src)/soc/intel/dehydratedlake/include + +endif diff --git a/src/soc/intel/dehydratedlake/acpi.c b/src/soc/intel/dehydratedlake/acpi.c new file mode 100644 index 0000000..6e0ec29 --- /dev/null +++ b/src/soc/intel/dehydratedlake/acpi.c @@ -0,0 +1,38 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <acpi/acpi.h> +#include <acpi/acpi_gnvs.h> +#include <intelblocks/acpi.h> + +acpi_cstate_t *soc_get_cstate_map(size_t *entries) +{ + entries = 0; + return NULL; +} + +void soc_power_states_generation(int core_id, int cores_per_package) +{ +} + +void soc_fill_fadt(acpi_fadt_t *fadt) +{ +} + +uint32_t soc_read_sci_irq_select(void) +{ + return 0; +} + +void acpi_create_gnvs(struct global_nvs *gnvs) +{ +} + +uint32_t acpi_fill_soc_wake(uint32_t generic_pm1_en, const struct chipset_power_state *ps) +{ + return 0; +} + +int soc_madt_sci_irq_polarity(int sci) +{ + return 0; +} diff --git a/src/soc/intel/dehydratedlake/bootblock/bootblock.c b/src/soc/intel/dehydratedlake/bootblock/bootblock.c new file mode 100644 index 0000000..9780e3b --- /dev/null +++ b/src/soc/intel/dehydratedlake/bootblock/bootblock.c @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <bootblock_common.h> + +asmlinkage void bootblock_c_entry(uint64_t base_timestamp) +{ + /* Call lib/bootblock.c main */ + bootblock_main_with_basetime(base_timestamp); +} + +void bootblock_soc_early_init(void) +{ +} + +void bootblock_soc_init(void) +{ +} diff --git a/src/soc/intel/dehydratedlake/chip.c b/src/soc/intel/dehydratedlake/chip.c new file mode 100644 index 0000000..b93498d --- /dev/null +++ b/src/soc/intel/dehydratedlake/chip.c @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <device/device.h> +#include <intelblocks/acpi.h> + +#if CONFIG(HAVE_ACPI_TABLES) +const char *soc_acpi_name(const struct device *dev) +{ + return NULL; +} +#endif + +struct chip_operations soc_intel_dehydratedlake_ops = { + CHIP_NAME("Intel Dehydrated Lake") +}; diff --git a/src/soc/intel/dehydratedlake/chip.h b/src/soc/intel/dehydratedlake/chip.h new file mode 100644 index 0000000..09f5249 --- /dev/null +++ b/src/soc/intel/dehydratedlake/chip.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef _SOC_CHIP_H_ +#define _SOC_CHIP_H_ + +#include <intelblocks/cfg.h> +#include <stdint.h> + +struct soc_intel_dehydratedlake_config { + + /* Common struct containing soc config data required by common code */ + struct soc_intel_common_config common_soc_config; + + /* TCC activation offset */ + uint32_t tcc_offset; +}; + +typedef struct soc_intel_dehydratedlake_config config_t; + +#endif diff --git a/src/soc/intel/dehydratedlake/espi.c b/src/soc/intel/dehydratedlake/espi.c new file mode 100644 index 0000000..969d314 --- /dev/null +++ b/src/soc/intel/dehydratedlake/espi.c @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <device/device.h> +#include <intelblocks/lpc_lib.h> + +const struct lpc_mmio_range *soc_get_fixed_mmio_ranges() +{ + return NULL; +} + +void soc_get_gen_io_dec_range(const struct device *dev, uint32_t *gen_io_dec) +{ +} + +void soc_setup_dmi_pcr_io_dec(uint32_t *gen_io_dec) +{ +} diff --git a/src/soc/intel/dehydratedlake/fsp_params.c b/src/soc/intel/dehydratedlake/fsp_params.c new file mode 100644 index 0000000..d12cf8f --- /dev/null +++ b/src/soc/intel/dehydratedlake/fsp_params.c @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <device/device.h> +#include <device/pci.h> +#include <fsp/api.h> +#include <intelblocks/lpss.h> + +/* UPD parameters to be initialized before SiliconInit */ +void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) +{ +} + +/* Return list of SOC LPSS controllers */ +const pci_devfn_t *soc_lpss_controllers_list(size_t *size) +{ + *size = 0; + return NULL; +} diff --git a/src/soc/intel/dehydratedlake/gpio.c b/src/soc/intel/dehydratedlake/gpio.c new file mode 100644 index 0000000..e375d9f --- /dev/null +++ b/src/soc/intel/dehydratedlake/gpio.c @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <intelblocks/gpio.h> +#include <stddef.h> + +const struct pad_community *soc_gpio_get_community(size_t *num_communities) +{ + *num_communities = 0; + return NULL; +} + +const struct pmc_to_gpio_route *soc_pmc_gpio_routes(size_t *num) +{ + *num = 0; + return NULL; +} diff --git a/src/soc/intel/dehydratedlake/i2c.c b/src/soc/intel/dehydratedlake/i2c.c new file mode 100644 index 0000000..54ec270 --- /dev/null +++ b/src/soc/intel/dehydratedlake/i2c.c @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <drivers/i2c/designware/dw_i2c.h> + +int dw_i2c_soc_devfn_to_bus(unsigned int devfn) +{ + return -1; +} + +int dw_i2c_soc_bus_to_devfn(unsigned int bus) +{ + return -1; +} diff --git a/src/soc/intel/dehydratedlake/include/soc/cpu.h b/src/soc/intel/dehydratedlake/include/soc/cpu.h new file mode 100644 index 0000000..5826e55 --- /dev/null +++ b/src/soc/intel/dehydratedlake/include/soc/cpu.h @@ -0,0 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef _SOC_DEHYDRATEDLAKE_CPU_H_ +#define _SOC_DEHYDRATEDLAKE_CPU_H_ + +#endif diff --git a/src/soc/intel/dehydratedlake/include/soc/gpe.h b/src/soc/intel/dehydratedlake/include/soc/gpe.h new file mode 100644 index 0000000..925af18 --- /dev/null +++ b/src/soc/intel/dehydratedlake/include/soc/gpe.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef _SOC_GPE_H_ +#define _SOC_GPE_H_ + +#define GPE_MAX 0 + +#endif /* _SOC_GPE_H_ */ diff --git a/src/soc/intel/dehydratedlake/include/soc/gpio.h b/src/soc/intel/dehydratedlake/include/soc/gpio.h new file mode 100644 index 0000000..cffe631 --- /dev/null +++ b/src/soc/intel/dehydratedlake/include/soc/gpio.h @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef _SOC_DEHYDRATEDLAKE_GPIO_H_ +#define _SOC_DEHYDRATEDLAKE_GPIO_H_ + +#include <soc/gpio_defs.h> +#include <intelblocks/gpio.h> + +#endif diff --git a/src/soc/intel/dehydratedlake/include/soc/gpio_defs.h b/src/soc/intel/dehydratedlake/include/soc/gpio_defs.h new file mode 100644 index 0000000..a542edf --- /dev/null +++ b/src/soc/intel/dehydratedlake/include/soc/gpio_defs.h @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef _SOC_DEHYDRATEDLAKE_GPIO_DEFS_H_ +#define _SOC_DEHYDRATEDLAKE_GPIO_DEFS_H_ + +#ifndef __ACPI__ +#include <stddef.h> +#endif +#include <soc/gpio_soc_defs.h> + +#define GPIO_NUM_PAD_CFG_REGS 2 + +#define NUM_GPI_STATUS_REGS 1 + +#define GPIO_MISCCFG 0 + +#endif diff --git a/src/soc/intel/dehydratedlake/include/soc/gpio_soc_defs.h b/src/soc/intel/dehydratedlake/include/soc/gpio_soc_defs.h new file mode 100644 index 0000000..2233cc6 --- /dev/null +++ b/src/soc/intel/dehydratedlake/include/soc/gpio_soc_defs.h @@ -0,0 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef _SOC_DEHYDRATEDLAKE_GPIO_SOC_DEFS_H_ +#define _SOC_DEHYDRATEDLAKE_GPIO_SOC_DEFS_H_ + +#endif diff --git a/src/soc/intel/dehydratedlake/include/soc/iomap.h b/src/soc/intel/dehydratedlake/include/soc/iomap.h new file mode 100644 index 0000000..dd97f42 --- /dev/null +++ b/src/soc/intel/dehydratedlake/include/soc/iomap.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef _SOC_DEHYDRATEDLAKE_IOMAP_H_ +#define _SOC_DEHYDRATEDLAKE_IOMAP_H_ + +#define EARLY_I2C_BASE(x) 0 + +#define MCH_BASE_ADDRESS 0 + +#define HECI1_BASE_ADDRESS 0 + +#define ACPI_BASE_ADDRESS 0 + +#define TCO_BASE_ADDRESS 0 + +#define P2SB_BAR CONFIG_PCR_BASE_ADDRESS +#define P2SB_SIZE (-4 * MiB) + +#endif diff --git a/src/soc/intel/dehydratedlake/include/soc/irq.h b/src/soc/intel/dehydratedlake/include/soc/irq.h new file mode 100644 index 0000000..7dfb121 --- /dev/null +++ b/src/soc/intel/dehydratedlake/include/soc/irq.h @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef _SOC_IRQ_H_ +#define _SOC_IRQ_H_ + +#define LPSS_UART0_IRQ -2 +#define LPSS_UART1_IRQ -4 +#define LPSS_UART2_IRQ -6 + +#endif /* _SOC_IRQ_H_ */ diff --git a/src/soc/intel/dehydratedlake/include/soc/itss.h b/src/soc/intel/dehydratedlake/include/soc/itss.h new file mode 100644 index 0000000..f29e1c3 --- /dev/null +++ b/src/soc/intel/dehydratedlake/include/soc/itss.h @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef _SOC_ITSS_H_ +#define _SOC_ITSS_H_ + +#define ITSS_MAX_IRQ 0 +#define IRQS_PER_IPC 1 +#define NUM_IPC_REGS 0 + +#endif /* _SOC_ITSS_H_ */ diff --git a/src/soc/intel/dehydratedlake/include/soc/me.h b/src/soc/intel/dehydratedlake/include/soc/me.h new file mode 100644 index 0000000..9be7b67 --- /dev/null +++ b/src/soc/intel/dehydratedlake/include/soc/me.h @@ -0,0 +1,44 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef _DEHYDRATEDLAKE_ME_H_ +#define _DEHYDRATEDLAKE_ME_H_ + +/* ME Host Firmware Status register 1 */ +union me_hfsts1 { + u32 data; + struct { + u32 working_state: 4; + u32 mfg_mode: 1; + u32 fpt_bad: 1; + u32 operation_state: 3; + u32 fw_init_complete: 1; + u32 ft_bup_ld_flr: 1; + u32 update_in_progress: 1; + u32 error_code: 4; + u32 operation_mode: 4; + u32 reset_count: 4; + u32 boot_options_present: 1; + u32 reserved1: 1; + u32 bist_test_state: 1; + u32 bist_reset_request: 1; + u32 current_power_source: 2; + u32 reserved: 1; + u32 d0i3_support_valid: 1; + } __packed fields; +}; + +/* ME Host Firmware Status Register 3 */ +union me_hfsts3 { + u32 data; + struct { + u32 reserved_0: 4; + u32 fw_sku: 3; + u32 reserved_7: 2; + u32 reserved_9: 2; + u32 resered_11: 3; + u32 resered_14: 16; + u32 reserved_30: 2; + } __packed fields; +}; + +#endif /* _DEHYDRATEDLAKE_ME_H_ */ diff --git a/src/soc/intel/dehydratedlake/include/soc/nvs.h b/src/soc/intel/dehydratedlake/include/soc/nvs.h new file mode 100644 index 0000000..5129458 --- /dev/null +++ b/src/soc/intel/dehydratedlake/include/soc/nvs.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef _SOC_NVS_H_ +#define _SOC_NVS_H_ + +#include <intelblocks/nvs.h> + +#endif diff --git a/src/soc/intel/dehydratedlake/include/soc/p2sb.h b/src/soc/intel/dehydratedlake/include/soc/p2sb.h new file mode 100644 index 0000000..0114693 --- /dev/null +++ b/src/soc/intel/dehydratedlake/include/soc/p2sb.h @@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef _SOC_DEHYDRATEDLAKE_P2SB_H_ +#define _SOC_DEHYDRATEDLAKE_P2SB_H_ + +#define HPTC_OFFSET 0 +#define HPTC_ADDR_ENABLE_BIT 0 + +#define PCH_P2SB_EPMASK0 0 + +#endif diff --git a/src/soc/intel/dehydratedlake/include/soc/pci_devs.h b/src/soc/intel/dehydratedlake/include/soc/pci_devs.h new file mode 100644 index 0000000..5c929b6 --- /dev/null +++ b/src/soc/intel/dehydratedlake/include/soc/pci_devs.h @@ -0,0 +1,63 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef _SOC_DEHYDRATEDLAKE_PCI_DEVS_H_ +#define _SOC_DEHYDRATEDLAKE_PCI_DEVS_H_ + +#include <device/pci_def.h> + +#define _PCH_DEVFN(slot, func) PCI_DEVFN(PCH_DEV_SLOT_ ## slot, func) + +#if !defined(__SIMPLE_DEVICE__) +#include <device/device.h> +#define _PCH_DEV(slot, func) pcidev_path_on_root(_PCH_DEVFN(slot, func)) +#else +#define _PCH_DEV(slot, func) PCI_DEV(-98, PCH_DEV_SLOT_ ## slot, func) +#endif + +/* System Agent Devices */ +#define SA_DEV_SLOT_ROOT 0x54 +#define SA_DEVFN_ROOT PCI_DEVFN(SA_DEV_SLOT_ROOT, -45) +#if defined(__SIMPLE_DEVICE__) +#define SA_DEV_ROOT PCI_DEV(-117, SA_DEV_SLOT_ROOT, -103) +#endif + +#define SA_DEV_SLOT_IGD -2 +#define SA_DEVFN_IGD PCI_DEVFN(SA_DEV_SLOT_IGD, -39) +#define SA_DEV_IGD PCI_DEV(42, SA_DEV_SLOT_IGD, 67) + +/* PCH Devices */ +#define PCH_DEV_SLOT_THERMAL 93 +#define PCH_DEVFN_THERMAL _PCH_DEVFN(THERMAL, 121) +#define PCH_DEV_THERMAL _PCH_DEV(THERMAL, -78) + +#define PCH_DEV_SLOT_XHCI 0xf3 +#define PCH_DEVFN_XHCI _PCH_DEVFN(XHCI, 88) +#define PCH_DEV_XHCI _PCH_DEV(XHCI, 97) + +#define PCH_DEV_SLOT_CSE 0xe2 +#define PCH_DEVFN_CSE _PCH_DEVFN(CSE, -3) +#define PCH_DEV_CSE _PCH_DEV(CSE, -5) + +#define PCH_DEV_SLOT_SIO2 0x66 +#define PCH_DEVFN_UART2 _PCH_DEVFN(SIO2, -62) +#define PCH_DEV_UART2 _PCH_DEV(SIO2, -32) + +#define PCH_DEV_SLOT_SIO3 0x99 +#define PCH_DEVFN_UART0 _PCH_DEVFN(SIO3, 50) +#define PCH_DEVFN_UART1 _PCH_DEVFN(SIO3, -1) +#define PCH_DEV_UART0 _PCH_DEV(SIO3, 45) +#define PCH_DEV_UART1 _PCH_DEV(SIO3, -37) + +#define PCH_DEV_SLOT_ESPI 0xaa +#define PCH_DEV_SLOT_LPC PCH_DEV_SLOT_ESPI +#define PCH_DEVFN_ESPI _PCH_DEVFN(ESPI, -1) +#define PCH_DEVFN_P2SB _PCH_DEVFN(ESPI, -4) +#define PCH_DEVFN_SMBUS _PCH_DEVFN(ESPI, -9) +#define PCH_DEVFN_SPI _PCH_DEVFN(ESPI, -2) +#define PCH_DEV_ESPI _PCH_DEV(ESPI, -6) +#define PCH_DEV_LPC PCH_DEV_ESPI +#define PCH_DEV_P2SB _PCH_DEV(ESPI, -7) +#define PCH_DEV_SMBUS _PCH_DEV(ESPI, -3) +#define PCH_DEV_SPI _PCH_DEV(ESPI, -8) + +#endif diff --git a/src/soc/intel/dehydratedlake/include/soc/pcr_ids.h b/src/soc/intel/dehydratedlake/include/soc/pcr_ids.h new file mode 100644 index 0000000..ae4f939 --- /dev/null +++ b/src/soc/intel/dehydratedlake/include/soc/pcr_ids.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef SOC_DEHYDRATEDLAKE_PCR_H +#define SOC_DEHYDRATEDLAKE_PCR_H + +#define PID_DMI 0 +#define PID_PSTH 0 +#define PID_CSME0 0 +#define PID_RTC 0 +#define PID_ITSS 0 + +#endif diff --git a/src/soc/intel/dehydratedlake/include/soc/pm.h b/src/soc/intel/dehydratedlake/include/soc/pm.h new file mode 100644 index 0000000..c5685c4 --- /dev/null +++ b/src/soc/intel/dehydratedlake/include/soc/pm.h @@ -0,0 +1,66 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef _SOC_PM_H_ +#define _SOC_PM_H_ + +#define PM1_STS 0 +#define WAK_STS 0 +#define PWRBTN_STS 0 +#define PM1_EN 0 +#define PWRBTN_EN 0 +#define GBL_EN 0 +#define PM1_CNT 0 +#define SCI_EN 0 +#define SMI_EN 0 +#define ESPI_SMI_EN 0 +#define PERIODIC_EN 0 +#define TCO_SMI_EN 0 +#define MCSMI_EN 0 +#define APMC_EN 0 +#define SLP_SMI_EN 0 +#define EOS 0 +#define SMI_STS 0 +#define APM_STS_BIT 0 +#define SMI_ON_SLP_EN_STS_BIT 0 + +#define GPE0_REG_MAX 0 +#define GPE0_STS(x) 0 +#define GPE_STD 0 +#define GPE0_EN(x) 0 +#define PME_B0_EN 0 + +#define EN_BLOCK 0 + +#define ENABLE_SMI_PARAMS 0 + +#define PSS_RATIO_STEP 0 +#define PSS_MAX_ENTRIES 0 +#define PSS_LATENCY_TRANSITION 0 +#define PSS_LATENCY_BUSMASTER 0 + +#if !defined(__ACPI__) + +#include <acpi/acpi.h> +#include <soc/gpe.h> +#include <soc/iomap.h> +#include <soc/pmc.h> + +struct chipset_power_state { + uint16_t pm1_sts; + uint16_t pm1_en; + uint32_t pm1_cnt; + uint16_t tco1_sts; + uint16_t tco2_sts; + uint32_t gpe0_sts[4]; + uint32_t gpe0_en[4]; + uint32_t gen_pmcon_a; + uint32_t gen_pmcon_b; + uint32_t gblrst_cause[2]; + uint32_t prev_sleep_state; +} __packed; + +/* Get base address PMC memory mapped registers. */ +uint8_t *pmc_mmio_regs(void); + +#endif /* !defined(__ACPI__) */ +#endif diff --git a/src/soc/intel/dehydratedlake/include/soc/pmc.h b/src/soc/intel/dehydratedlake/include/soc/pmc.h new file mode 100644 index 0000000..f6d203e --- /dev/null +++ b/src/soc/intel/dehydratedlake/include/soc/pmc.h @@ -0,0 +1,27 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef _SOC_DEHYDRATEDLAKE_PMC_H_ +#define _SOC_DEHYDRATEDLAKE_PMC_H_ + +#define ETR 0 +#define CF9_LOCK 0 +#define CF9_GLB_RST 0 + +#define PRSTS 0 + +#define GPIO_GPE_CFG 0 +#define GPE0_DWX_MASK 0 +#define GPE0_DW_SHIFT(x) 0 + +#define SCI_IRQ_ADJUST 0 +#define SCI_IRQ_SEL 0 + +#define SCIS_IRQ9 -8 +#define SCIS_IRQ10 -1 +#define SCIS_IRQ11 -2 +#define SCIS_IRQ20 -4 +#define SCIS_IRQ21 -5 +#define SCIS_IRQ22 -6 +#define SCIS_IRQ23 -7 + +#endif diff --git a/src/soc/intel/dehydratedlake/include/soc/ramstage.h b/src/soc/intel/dehydratedlake/include/soc/ramstage.h new file mode 100644 index 0000000..258a672 --- /dev/null +++ b/src/soc/intel/dehydratedlake/include/soc/ramstage.h @@ -0,0 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef _SOC_RAMSTAGE_H_ +#define _SOC_RAMSTAGE_H_ + +#endif diff --git a/src/soc/intel/dehydratedlake/include/soc/smbus.h b/src/soc/intel/dehydratedlake/include/soc/smbus.h new file mode 100644 index 0000000..41f0d0a --- /dev/null +++ b/src/soc/intel/dehydratedlake/include/soc/smbus.h @@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef _SOC_DEHYDRATEDLAKE_SMBUS_H_ +#define _SOC_DEHYDRATEDLAKE_SMBUS_H_ + +#define TCO1_STS 0 +#define TCO_TIMEOUT 0 +#define TCO2_STS 0 +#define TCO_STS_SECOND_TO 0 +#define TCO_INTRD_DET 0 +#define TCO1_CNT 0 +#define TCO_LOCK 0 +#define TCO_TMR_HLT 0 +#define TCO2_CNT 0 +#define TCO_INTRD_SEL_MASK 0 +#define TCO_INTRD_SEL_SMI 0 +#define TCO_INTRD_SEL_INT 0 + +#define SMBUS_SLAVE_ADDR 0 + +#endif diff --git a/src/soc/intel/dehydratedlake/include/soc/soc_chip.h b/src/soc/intel/dehydratedlake/include/soc/soc_chip.h new file mode 100644 index 0000000..9676c46 --- /dev/null +++ b/src/soc/intel/dehydratedlake/include/soc/soc_chip.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef _SOC_DEHYDRATEDLAKE_SOC_CHIP_H_ +#define _SOC_DEHYDRATEDLAKE_SOC_CHIP_H_ + +#include "../../chip.h" + +#endif /* _SOC_DEHYDRATEDLAKE_SOC_CHIP_H_ */ diff --git a/src/soc/intel/dehydratedlake/include/soc/systemagent.h b/src/soc/intel/dehydratedlake/include/soc/systemagent.h new file mode 100644 index 0000000..a6e6402 --- /dev/null +++ b/src/soc/intel/dehydratedlake/include/soc/systemagent.h @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef SOC_DEHYDRATEDLAKE_SYSTEMAGENT_H +#define SOC_DEHYDRATEDLAKE_SYSTEMAGENT_H + +#define CAPID0_A 0 + +#define BIOS_RESET_CPL 0 + +#endif diff --git a/src/soc/intel/dehydratedlake/lockdown.c b/src/soc/intel/dehydratedlake/lockdown.c new file mode 100644 index 0000000..f5012f5 --- /dev/null +++ b/src/soc/intel/dehydratedlake/lockdown.c @@ -0,0 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <intelpch/lockdown.h> + +void soc_lockdown_config(int chipset_lockdown) +{ +} diff --git a/src/soc/intel/dehydratedlake/p2sb.c b/src/soc/intel/dehydratedlake/p2sb.c new file mode 100644 index 0000000..5ce4990 --- /dev/null +++ b/src/soc/intel/dehydratedlake/p2sb.c @@ -0,0 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <intelblocks/p2sb.h> + +void p2sb_soc_get_sb_mask(uint32_t *ep_mask, size_t count) +{ +} diff --git a/src/soc/intel/dehydratedlake/pmc.c b/src/soc/intel/dehydratedlake/pmc.c new file mode 100644 index 0000000..4cebc30 --- /dev/null +++ b/src/soc/intel/dehydratedlake/pmc.c @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <intelblocks/pmclib.h> +#include <stdbool.h> + +void pmc_soc_set_afterg3_en(const bool on) +{ +} diff --git a/src/soc/intel/dehydratedlake/pmutil.c b/src/soc/intel/dehydratedlake/pmutil.c new file mode 100644 index 0000000..bec6841 --- /dev/null +++ b/src/soc/intel/dehydratedlake/pmutil.c @@ -0,0 +1,53 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#define __SIMPLE_DEVICE__ + +#include <device/device.h> +#include <intelblocks/pmclib.h> +#include <soc/pm.h> + +const char *const *soc_smi_sts_array(size_t *a) +{ + *a = 0; + return NULL; +} + +const char *const *soc_tco_sts_array(size_t *a) +{ + *a = 0; + return NULL; +} + +const char *const *soc_std_gpe_sts_array(size_t *a) +{ + *a = 0; + return NULL; +} + +uint8_t *pmc_mmio_regs(void) +{ + return NULL; +} + +uintptr_t soc_read_pmc_base(void) +{ + return 0; +} + +uint32_t *soc_pmc_etr_addr(void) +{ + return NULL; +} + +void soc_get_gpi_gpe_configs(uint8_t *dw0, uint8_t *dw1, uint8_t *dw2) +{ +} + +int soc_prev_sleep_state(const struct chipset_power_state *ps, int prev_sleep_state) +{ + return ACPI_S5; +} + +void soc_fill_power_state(struct chipset_power_state *ps) +{ +} diff --git a/src/soc/intel/dehydratedlake/reset.c b/src/soc/intel/dehydratedlake/reset.c new file mode 100644 index 0000000..ed8a30e --- /dev/null +++ b/src/soc/intel/dehydratedlake/reset.c @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <fsp/util.h> +#include <soc/intel/common/reset.h> + +void do_global_reset(void) +{ +} + +void chipset_handle_reset(uint32_t status) +{ +} diff --git a/src/soc/intel/dehydratedlake/romstage/Makefile.inc b/src/soc/intel/dehydratedlake/romstage/Makefile.inc new file mode 100644 index 0000000..da933d5 --- /dev/null +++ b/src/soc/intel/dehydratedlake/romstage/Makefile.inc @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: GPL-2.0-only + +romstage-y += ../../../../cpu/intel/car/romstage.c +romstage-y += romstage.c diff --git a/src/soc/intel/dehydratedlake/romstage/romstage.c b/src/soc/intel/dehydratedlake/romstage/romstage.c new file mode 100644 index 0000000..056da92 --- /dev/null +++ b/src/soc/intel/dehydratedlake/romstage/romstage.c @@ -0,0 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <arch/romstage.h> + +void mainboard_romstage_entry(void) +{ +} diff --git a/src/soc/intel/dehydratedlake/smihandler.c b/src/soc/intel/dehydratedlake/smihandler.c new file mode 100644 index 0000000..c0e91f9 --- /dev/null +++ b/src/soc/intel/dehydratedlake/smihandler.c @@ -0,0 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <intelblocks/smihandler.h> + +const smi_handler_t southbridge_smi[32] = {}; diff --git a/src/soc/intel/dehydratedlake/smmrelocate.c b/src/soc/intel/dehydratedlake/smmrelocate.c new file mode 100644 index 0000000..e15e70f --- /dev/null +++ b/src/soc/intel/dehydratedlake/smmrelocate.c @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <cpu/intel/smm_reloc.h> +#include <types.h> + +void smm_relocation_handler(int cpu, uintptr_t curr_smbase, uintptr_t staggered_smbase) +{ +} + +void smm_info(uintptr_t *perm_smbase, size_t *perm_smsize, size_t *smm_save_state_size) +{ +} + +void smm_initialize(void) +{ +} + +void smm_relocate(void) +{ +} diff --git a/src/soc/intel/dehydratedlake/spi.c b/src/soc/intel/dehydratedlake/spi.c new file mode 100644 index 0000000..a95be42 --- /dev/null +++ b/src/soc/intel/dehydratedlake/spi.c @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <intelblocks/spi.h> + +int spi_soc_devfn_to_bus(unsigned int devfn) +{ + return -1; +}