Attention is currently required from: Kapil Porwal, Sridhar Siricilla, Subrata Banik.
Hello Kapil Porwal, Sridhar Siricilla, Subrata Banik, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/74995?usp=email
to look at the new patch set (#32).
The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins)
Change subject: soc/intel/cmd/blk/cse: Cache CSE version in CMOS memory for cold boots ......................................................................
soc/intel/cmd/blk/cse: Cache CSE version in CMOS memory for cold boots
This patch changes where the CSE version is stored. Previously, it was stored in volatile CBMEM memory, which resets during a cold reboot. Now, it is stored in persistent CMOS memory, which does not reset during a cold reboot.
The CSE version is used to determine if the ISH version needs to be updated. If the CSE version is changed, then the ISH version will be updated. This change will improve the performance of cold reboots, because the ISH version will only be fetched when it is necessary. The cold boot performance is increased by around ~200ms.
BUG=b:280722061 TEST=CSE and ISH version verified on nivviks and marasov board.
Signed-off-by: Dinesh Gehlot digehlot@google.com Change-Id: Idd0ee19575683691c0a82a291e1fd3b2ffb11786 --- M src/soc/intel/common/block/cse/Kconfig M src/soc/intel/common/block/cse/Makefile.inc A src/soc/intel/common/block/cse/cse_lite_cmos.c A src/soc/intel/common/block/include/intelblocks/cse_lite_cmos.h 4 files changed, 188 insertions(+), 7 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/74995/32