Raul Rangel has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/62873 )
Change subject: mb/google/skyrim: Enable tis_plat_irq_status ......................................................................
mb/google/skyrim: Enable tis_plat_irq_status
This will fix:
[INFO ] Probing TPM I2C: tis_plat_irq_status() not implemented, wasting 20ms to wait on Cr50!
BUG=b:224618411 TEST=Compile skyrim
Signed-off-by: Raul E Rangel rrangel@chromium.org Change-Id: I5add694506ad089adcc8961f101bf507bc39a522 --- M src/mainboard/google/skyrim/variants/baseboard/Makefile.inc M src/mainboard/google/skyrim/variants/baseboard/gpio.c 2 files changed, 5 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/62873/1
diff --git a/src/mainboard/google/skyrim/variants/baseboard/Makefile.inc b/src/mainboard/google/skyrim/variants/baseboard/Makefile.inc index dc1c1fe..7706e50 100644 --- a/src/mainboard/google/skyrim/variants/baseboard/Makefile.inc +++ b/src/mainboard/google/skyrim/variants/baseboard/Makefile.inc @@ -1,7 +1,11 @@ bootblock-y += gpio.c
romstage-y += gpio.c +romstage-y += tpm_tis.c
ramstage-y += gpio.c +ramstage-y += tpm_tis.c + +verstage-y += tpm_tis.c
smm-y += gpio.c diff --git a/src/mainboard/google/skyrim/variants/baseboard/gpio.c b/src/mainboard/google/skyrim/variants/baseboard/gpio.c index f095651..204ddf6 100644 --- a/src/mainboard/google/skyrim/variants/baseboard/gpio.c +++ b/src/mainboard/google/skyrim/variants/baseboard/gpio.c @@ -39,7 +39,7 @@ /* SOC_SAR_INT_L */ PAD_SCI(GPIO_17, PULL_NONE, EDGE_LOW), /* GSC_SOC_INT_L */ - PAD_GPI(GPIO_18, PULL_NONE), + PAD_INT(GPIO_18, PULL_NONE, EDGE_LOW, STATUS_DELIVERY), /* I2C3_SCL */ PAD_NF(GPIO_19, I2C3_SCL, PULL_NONE), /* I2C3_SDA */