Rob Barnes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44429 )
Change subject: util: Add spd_tools to generate DDR4 SPDs for TGL boards ......................................................................
Patch Set 19:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44429/19/util/spd_tools/intel/ddr4/... File util/spd_tools/intel/ddr4/global_ddr4_mem_parts.json.txt:
https://review.coreboot.org/c/coreboot/+/44429/19/util/spd_tools/intel/ddr4/... PS19, Line 12: "CASLatencies": "9 10 11 12 13 14 15 16 17 19 19 20" 19 is listed twice.