Attention is currently required from: Arthur Heymans, Patrick Rudolph. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59845 )
Change subject: soc/block/systemagent: Do more fine grained resource allocation ......................................................................
Patch Set 1:
(2 comments)
File src/soc/intel/common/block/systemagent/systemagent.c:
https://review.coreboot.org/c/coreboot/+/59845/comment/e48962ad_9fa94f30 PS1, Line 182: printk(BIOS_DEBUG, "%s UC memory: base=0x%lx, size=0x%lx\n", __func__, base_k, size_k);
line over 96 characters
Please fix.
https://review.coreboot.org/c/coreboot/+/59845/comment/0e325e56_a5621483 PS1, Line 191: reserved_ram_resource(dev, index++, base_k / KiB, size_k / KiB); IIRC, the cacheability of TSEG is ultimately decided by SMRRs, which override MTRR settings. With this patch, I'd expect MTRR usage to increase.