[coreboot-gerrit] Change in coreboot[master]: security/intel/txt: Issue a global reset when TXT_RESET bit is set

[Michał Żygowski (Code Review)]

Michał Żygowski has submitted this change. ( https://review.coreboot.org/c/coreboot/+/59639 )

Change subject: security/intel/txt: Issue a global reset when TXT_RESET bit is set
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security/intel/txt: Issue a global reset when TXT_RESET bit is set

Although TXT specification says to do power cycle reset if TXT_RESET
is set, all Intel provided implementations issue a global reset here.

TEST=Perform ungraceful shutdown after SENTER to trigger SCLEAN path
on Dell OptiPlex 9010 and successfully call ACM SCLEAN.

Signed-off-by: Michał Żygowski 
Change-Id: I8ee2400fab20857ff89b14bb7b662a938b775304
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59639
Tested-by: build bot (Jenkins) 
Reviewed-by: Angel Pons 
---
M src/security/intel/txt/common.c
M src/security/intel/txt/romstage.c
M src/security/intel/txt/txt.h
3 files changed, 4 insertions(+), 4 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Angel Pons: Looks good to me, approved

diff --git a/src/security/intel/txt/common.c b/src/security/intel/txt/common.c
index 61ff0eb..14bd296 100644
--- a/src/security/intel/txt/common.c
+++ b/src/security/intel/txt/common.c
@@ -27,7 +27,7 @@
 #include "txt_getsec.h"

/* Usual security practice: if an unexpected error happens, reboot */
-static void __noreturn txt_reset_platform(void)
+void __noreturn txt_reset_platform(void)
 {
 #if CONFIG(SOC_INTEL_COMMON_BLOCK_SA)
    global_reset();
diff --git a/src/security/intel/txt/romstage.c b/src/security/intel/txt/romstage.c
index ef069ef..63db10f 100644
--- a/src/security/intel/txt/romstage.c
+++ b/src/security/intel/txt/romstage.c
@@ -108,8 +108,8 @@
    	printk(BIOS_ERR, "TEE-TXT: Secrets remain in memory. SCLEAN is required.\n");

if (txt_ests & TXT_ESTS_TXT_RESET_STS) {
-			printk(BIOS_ERR, "TEE-TXT: TXT_RESET bit set, doing full reset!\n");
-			full_reset();
+			printk(BIOS_ERR, "TEE-TXT: TXT_RESET bit set, doing global reset!\n");
+			txt_reset_platform();
    	}

/* FIXME: Clear SLP_TYP# */
diff --git a/src/security/intel/txt/txt.h b/src/security/intel/txt/txt.h
index 63ac91c..64e507d 100644
--- a/src/security/intel/txt/txt.h
+++ b/src/security/intel/txt/txt.h
@@ -18,7 +18,7 @@
 #define ACM_E_PLATFORM_IS_NOT_PROD          0x10

void intel_txt_romstage_init(void);
-
+void __noreturn txt_reset_platform(void);
 void intel_txt_log_bios_acm_error(void);
 int intel_txt_log_acm_error(const uint32_t acm_error);
 void intel_txt_log_spad(void);

3 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.