Attention is currently required from: Hung-Te Lin, Yidi Lin, Yu-Ping Wu.
Jarried Lin has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85564?usp=email )
Change subject: soc/mediatek/mt8196: Add SD card configurations ......................................................................
soc/mediatek/mt8196: Add SD card configurations
Rauru reference design has SD card interfaces, so we have to configure it in ramstage.
Implement msdc.c (memory and SD Card controller) to place the SD card drivers.
This implementation is based on chapter 10.3 in MT8196 Functional Specification.
TEST=Build pass BUG=b:317009620
Change-Id: Ibb6a075d0f1b5a647e93a58b3ea1029b7676c765 Signed-off-by: Andy-ld Lu andy-ld.lu@mediatek.corp-partner.google.com --- M src/soc/mediatek/mt8196/Makefile.mk A src/soc/mediatek/mt8196/msdc.c 2 files changed, 77 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/85564/1
diff --git a/src/soc/mediatek/mt8196/Makefile.mk b/src/soc/mediatek/mt8196/Makefile.mk index bc8fe04..14dc348 100644 --- a/src/soc/mediatek/mt8196/Makefile.mk +++ b/src/soc/mediatek/mt8196/Makefile.mk @@ -47,6 +47,7 @@ ramstage-y += ../common/mcu.c ramstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c ramstage-$(CONFIG_PCI) += ../common/pcie.c pcie.c +ramstage-$(CONFIG_COMMONLIB_STORAGE_MMC) += msdc.c ramstage-y += ../common/mt6363.c mt6363.c ramstage-y += ../common/mt6363_sdmadc.c ramstage-y += ../common/mt6373.c mt6373.c diff --git a/src/soc/mediatek/mt8196/msdc.c b/src/soc/mediatek/mt8196/msdc.c new file mode 100644 index 0000000..9d4d7fd --- /dev/null +++ b/src/soc/mediatek/mt8196/msdc.c @@ -0,0 +1,76 @@ +/* SPDX-License-Identifier: GPL-2.0-only OR MIT */ + +/* + * This file is created based on MT8196 Functional Specification + * Chapter number: 10.3 + */ + +#include <device/mmio.h> +#include <gpio.h> +#include <soc/addressmap.h> +#include <soc/regulator.h> +#include <soc/msdc.h> + +DEFINE_BITFIELD(MSDC1_DRV, 17, 0) +DEFINE_BITFIELD(MSDC1_GPIO_MODE0_0, 30, 28) +DEFINE_BITFIELD(MSDC1_GPIO_MODE0_1, 26, 24) +DEFINE_BITFIELD(MSDC1_GPIO_MODE0_2, 22, 20) +DEFINE_BITFIELD(MSDC1_GPIO_MODE1_0, 10, 8) +DEFINE_BITFIELD(MSDC1_GPIO_MODE1_1, 6, 4) +DEFINE_BITFIELD(MSDC1_GPIO_MODE1_2, 2, 0) + +#define MSDC1_DRV_OFFSET_0 0x0 + +#define MSDC1_DRV_VALUE_0 0x12492 +#define MSDC1_GPIO_MODE0_VALUE 0x1 +#define MSDC1_GPIO_MODE1_VALUE 0x1 + +enum { + MSDC1_GPIO_MODE0_BASE = 0x1002D3F0, + MSDC1_GPIO_MODE1_BASE = 0x1002D400, +}; + +void mtk_msdc_configure_sdcard(void) +{ + void *gpio_base = (void *)IOCFG_BM3_BASE; + void *gpio_mode0_base = (void *)MSDC1_GPIO_MODE0_BASE; + void *gpio_mode1_base = (void *)MSDC1_GPIO_MODE1_BASE; + unsigned int i; + + const gpio_t sdcard_pu_pin[] = { + GPIO(MSDC1_DAT0), GPIO(MSDC1_DAT1), + GPIO(MSDC1_DAT2), GPIO(MSDC1_DAT3), + GPIO(MSDC1_CMD), + }; + + const gpio_t sdcard_pd_pin[] = { + GPIO(MSDC1_CLK), + }; + + for (i = 0; i < ARRAY_SIZE(sdcard_pu_pin); i++) + gpio_set_pull(sdcard_pu_pin[i], GPIO_PULL_ENABLE, GPIO_PULL_UP); + + for (i = 0; i < ARRAY_SIZE(sdcard_pd_pin); i++) + gpio_set_pull(sdcard_pd_pin[i], GPIO_PULL_ENABLE, GPIO_PULL_DOWN); + + /* set SD card cmd/dat/clk pins driving to 6mA */ + SET32_BITFIELDS(gpio_base + MSDC1_DRV_OFFSET_0, MSDC1_DRV, MSDC1_DRV_VALUE_0); + + /* set SD card dat0/cmd/clk pins to msdc1 mode */ + SET32_BITFIELDS(gpio_mode0_base, + MSDC1_GPIO_MODE0_0, MSDC1_GPIO_MODE0_VALUE, + MSDC1_GPIO_MODE0_1, MSDC1_GPIO_MODE0_VALUE, + MSDC1_GPIO_MODE0_2, MSDC1_GPIO_MODE0_VALUE); + + /* set SD card dat3/dat2/dat1 pin to msdc1 mode */ + SET32_BITFIELDS(gpio_mode1_base, + MSDC1_GPIO_MODE1_0, MSDC1_GPIO_MODE1_VALUE, + MSDC1_GPIO_MODE1_1, MSDC1_GPIO_MODE1_VALUE, + MSDC1_GPIO_MODE1_2, MSDC1_GPIO_MODE1_VALUE); + + /* enable SD card power */ + mainboard_enable_regulator(MTK_REGULATOR_VMCH, true); + mainboard_enable_regulator(MTK_REGULATOR_VMC, true); + mainboard_set_regulator_voltage(MTK_REGULATOR_VMCH, 3000000); + mainboard_set_regulator_voltage(MTK_REGULATOR_VMC, 3000000); +}