[coreboot-gerrit] [M] Change in coreboot[main]: intel/alderlake: Add helper functions for Power Management

[Angel Pons (Code Review)]

Attention is currently required from: Dinesh Gehlot, Eric Lai, Kapil Porwal, Matt DeVillier, Nick Vaccaro, Nico Huber, Paul Menzel, Sean Rhodes, Subrata Banik.

Angel Pons has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/81638?usp=email )

Change subject: intel/alderlake: Add helper functions for Power Management
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Patch Set 18:

(1 comment)

File src/soc/intel/alderlake/fsp_params.c:

https://review.coreboot.org/c/coreboot/+/81638/comment/e4608aad_6b110738?usp... :
PS15, Line 507: if (rp_cfg->pcie_rp_aspm == 0)
              : 		s_cfg->PcieRpAspm[index] = 4;
              : 	else
              : 		s_cfg->PcieRpAspm[index] = rp_cfg->pcie_rp_aspm - 1;
> Added prefixes but will do a follow up patch to move it to common code so mtl can share. […]

Any reason not to incorporate `CONFIG(SOC_INTEL_COMPLIANCE_TEST_MODE)` inside the helper functions? And `!CONFIG(PCIEXP_L1_SUB_STATE)` as well