Werner Zeh has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/62698 )
Change subject: mb/siemens/mc_ehl: Use 512 bytes for SPD buffer ......................................................................
mb/siemens/mc_ehl: Use 512 bytes for SPD buffer
DDR4 SPD data needs to be 512 byte to comply with the spec. Though there is no vital timing data used beyond 256 byte there are some part information which will be used to show the part info in the coreboot log. If the buffer is too small this log shows garbage.
This patch increases the SPD buffer size from 256 byte to 512 to avoid side effects.
Change-Id: I5b88df7818cfd62b3579d69f9f5bb14880f49c8c Signed-off-by: Werner Zeh werner.zeh@siemens.com --- M src/mainboard/siemens/mc_ehl/romstage_fsp_params.c 1 file changed, 4 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/62698/1
diff --git a/src/mainboard/siemens/mc_ehl/romstage_fsp_params.c b/src/mainboard/siemens/mc_ehl/romstage_fsp_params.c index 82e2090..c5f906f 100644 --- a/src/mainboard/siemens/mc_ehl/romstage_fsp_params.c +++ b/src/mainboard/siemens/mc_ehl/romstage_fsp_params.c @@ -10,11 +10,13 @@ #include <string.h> #include <types.h>
+#include <lib.h> + void mainboard_memory_init_params(FSPM_UPD *memupd) { static struct spd_info spd_info; const struct mb_cfg *board_cfg = variant_memcfg_config(); - static uint8_t spd_data[0x100]; + static uint8_t spd_data[0x200]; const char *cbfs_hwi_name = "hwinfo.hex";
/* Initialize SPD information for LPDDR4x from HW-Info primarily with a fallback to @@ -23,6 +25,7 @@ if ((hwilib_find_blocks(cbfs_hwi_name) == CB_SUCCESS) && (hwilib_get_field(SPD, spd_data, 0x80) == 0x80) && (ddr_crc16(spd_data, 126) == read16((void *)&spd_data[126]))) { + hexdump(spd_data, sizeof(spd_data)); spd_info.spd_spec.spd_data_ptr_info.spd_data_ptr = (uintptr_t)spd_data; spd_info.spd_spec.spd_data_ptr_info.spd_data_len = sizeof(spd_data); spd_info.read_type = READ_SPD_MEMPTR;