Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31445 )
Change subject: soc/intel/cannonlake: Add a config for configuring SD_VDD1_PWR_EN# ......................................................................
Patch Set 11:
(1 comment)
Please note that neither does hatch set `SdCardPowerEnableActiveHigh` nor is the UPD ever set (the chip.h field is simply ignored). Which means that at the end of this patch train, both redundant options are already out of sync.
it was set to 1 as a default, i think that was reason it was not added. Will update the params.
Let me rephrase. There is a setting in coreboot's `chip.h` that is ignored. There is no "reason" :)
https://review.coreboot.org/#/c/31445/10/src/soc/intel/cannonlake/fsp_params... File src/soc/intel/cannonlake/fsp_params.c:
https://review.coreboot.org/#/c/31445/10/src/soc/intel/cannonlake/fsp_params... PS10, Line 216: CONFIG_MB_HAS_ACTIVE_HIGH_SD_PWR_ENABLE; thanks