[coreboot-gerrit] [M] Change in coreboot[master]: soc/amd/fch_spi: Inline spi_bar read and writes

[Raul Rangel (Code Review)]

Attention is currently required from: Jason Glenesk, Matt DeVillier, Arthur Heymans, Martin Roth, Felix Held.

Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71563 )

Change subject: soc/amd/fch_spi: Inline spi_bar read and writes
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Patch Set 1:

(1 comment)

Commit Message:

https://review.coreboot.org/c/coreboot/+/71563/comment/1d7f941a_da296925 
PS1, Line 25: 16-19ms
That's crazy... Why? Was calling a function really that expensive?

Does soc/amd/common/block/spi/fch_spi_util.c still serve a purpose?