[coreboot-gerrit] [XS] Change in coreboot[master]: soc/intel/cometlake: Enable early caching of RAMTOP region

[Matt DeVillier (Code Review)]

Attention is currently required from: Sean Rhodes, Subrata Banik.

Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74517?usp=email )

Change subject: soc/intel/cometlake: Enable early caching of RAMTOP region
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Patch Set 7:

(1 comment)

Commit Message:

https://review.coreboot.org/c/coreboot/+/74517/comment/33df6c2e_ad1c7c77 :
PS4, Line 12: Purpose of this feature is to cache the TOM (with a fixed size of
            : 16MB)
> how does this affect CML boards with a 32MB flash? There's a handful of google/hatch and puff varian […]

resolved in discussion in CB:74518