Vladimir Serbinenko (phcoder@gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5133
-gerrit
commit b1569691c7f797adb625dd1f37736a653918eb8d Author: Vladimir Serbinenko phcoder@gmail.com Date: Wed Feb 5 15:03:50 2014 +0100
southbridge/bd82x6x: Reserve 16 MiB for flash and not 8.
X230 has 12 MiB flash. SPI controller supports up to 2 x 16 MiB of flash but address map limits this to 16MiB.
Change-Id: Icc39c3c8d45d2d14e437bdfce920f8b4b039789d Signed-off-by: Vladimir Serbinenko phcoder@gmail.com --- src/southbridge/intel/bd82x6x/lpc.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c index 396b771..fa05d54 100644 --- a/src/southbridge/intel/bd82x6x/lpc.c +++ b/src/southbridge/intel/bd82x6x/lpc.c @@ -597,8 +597,11 @@ static void pch_lpc_read_resources(device_t dev) IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
res = new_resource(dev, IOINDEX_SUBTRACTIVE(io_index++, 0)); - res->base = 0xff800000; - res->size = 0x00800000; /* 8 MB for flash */ + res->base = 0xff000000; + /* Some systems (e.g. X230) have 12 MiB flash. + SPI controller supports up to 2 x 16 MiB of flash but + address map limits this to 16MiB. */ + res->size = 0x01000000; /* 16 MB for flash */ res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;