[coreboot-gerrit] Change in coreboot[master]: mainboard/volteer: Enable Tcss D3cold for volteer2, delbin & voxel

[Ravishankar Sarawadi (Code Review)]

Ravishankar Sarawadi has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43621 )

Change subject: mainboard/volteer: Enable Tcss D3cold for volteer2, delbin & voxel
......................................................................

mainboard/volteer: Enable Tcss D3cold for volteer2, delbin & voxel

Enable D3cold on QS only for better Power savings. On ES2, there are
known limitations.

BUG=None
TEST=Check PC10 entries when system is in Idle and confirm power measurement.

Signed-off-by: Ravi Sarawadi 
Change-Id: I673f0a8405d8c7cbbb35f675680acaf4d81e304b
---
M src/mainboard/google/volteer/variants/baseboard/devicetree.cb
M src/mainboard/google/volteer/variants/halvor/overridetree.cb
M src/mainboard/google/volteer/variants/malefor/overridetree.cb
M src/mainboard/google/volteer/variants/terrador/overridetree.cb
M src/mainboard/google/volteer/variants/trondo/overridetree.cb
M src/mainboard/google/volteer/variants/volteer/overridetree.cb
6 files changed, 6 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/43621/1

diff --git a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb
index e0d3bea..8208fe3 100644
--- a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb
@@ -172,7 +172,7 @@

# D3Hot and D3Cold for TCSS
    register "TcssD3HotEnable" = "1"
-	register "TcssD3ColdEnable" = "0"
+	register "TcssD3ColdEnable" = "1"

# DP port
    register "DdiPortAConfig" = "1"	# eDP
diff --git a/src/mainboard/google/volteer/variants/halvor/overridetree.cb b/src/mainboard/google/volteer/variants/halvor/overridetree.cb
index 12e059c..2ca8d0a 100644
--- a/src/mainboard/google/volteer/variants/halvor/overridetree.cb
+++ b/src/mainboard/google/volteer/variants/halvor/overridetree.cb
@@ -16,6 +16,7 @@
    register "usb3_ports[3]" = "USB3_PORT_EMPTY"		# Type-A / Type-C Not Used

register "SaGv" = "SaGv_Disabled"
+	register "TcssD3ColdEnable" = "0"

device domain 0 on
    	device pci 15.0 on
diff --git a/src/mainboard/google/volteer/variants/malefor/overridetree.cb b/src/mainboard/google/volteer/variants/malefor/overridetree.cb
index c84ed83..92c3e52 100644
--- a/src/mainboard/google/volteer/variants/malefor/overridetree.cb
+++ b/src/mainboard/google/volteer/variants/malefor/overridetree.cb
@@ -18,6 +18,7 @@
    register "usb3_ports[3]" = "USB3_PORT_EMPTY"		# Type-A / Type-C Not Used

register "SaGv" = "SaGv_Disabled"
+	register "TcssD3ColdEnable" = "0"

# I2C Port Config
    register "SerialIoI2cMode" = "{
diff --git a/src/mainboard/google/volteer/variants/terrador/overridetree.cb b/src/mainboard/google/volteer/variants/terrador/overridetree.cb
index c1c386a..c397e0f9 100644
--- a/src/mainboard/google/volteer/variants/terrador/overridetree.cb
+++ b/src/mainboard/google/volteer/variants/terrador/overridetree.cb
@@ -18,6 +18,7 @@
    register "usb3_ports[3]" = "USB3_PORT_EMPTY"		# Type-A / Type-C Not Used

register "SaGv" = "SaGv_Disabled"
+	register "TcssD3ColdEnable" = "0"

device domain 0 on
    	device pci 15.0 on
diff --git a/src/mainboard/google/volteer/variants/trondo/overridetree.cb b/src/mainboard/google/volteer/variants/trondo/overridetree.cb
index 0932b64..2320c56 100644
--- a/src/mainboard/google/volteer/variants/trondo/overridetree.cb
+++ b/src/mainboard/google/volteer/variants/trondo/overridetree.cb
@@ -1,5 +1,6 @@
 chip soc/intel/tigerlake
    register "SaGv" = "SaGv_Disabled"
+	register "TcssD3ColdEnable" = "0"
    device domain 0 on
    	device pci 15.1 on
    		chip drivers/i2c/hid
diff --git a/src/mainboard/google/volteer/variants/volteer/overridetree.cb b/src/mainboard/google/volteer/variants/volteer/overridetree.cb
index 0944765..97e9391 100644
--- a/src/mainboard/google/volteer/variants/volteer/overridetree.cb
+++ b/src/mainboard/google/volteer/variants/volteer/overridetree.cb
@@ -1,5 +1,6 @@
 chip soc/intel/tigerlake
    register "SaGv" = "SaGv_Disabled"
+	register "TcssD3ColdEnable" = "0"
    device domain 0 on
    	device pci 15.0 on
    		chip drivers/i2c/generic