[coreboot-gerrit] [S] Change in coreboot[master]: soc/intel/meteorlake: Provide mitigation support for CNVi RFI

[Angel Pons (Code Review)]

Angel Pons has submitted this change. ( https://review.coreboot.org/c/coreboot/+/67789 )

Change subject: soc/intel/meteorlake: Provide mitigation support for CNVi RFI
......................................................................

soc/intel/meteorlake: Provide mitigation support for CNVi RFI

The DDR RFIM is a frequency shifting RFI mitigation feature required by
the Intel integrated Wi-Fi firmware(CNVi) for Meteor Lake. Please refer
to Intel technical white paper 640438_Intel_DDR_Mem_RFIM_Policy_Enable
once it is externally available. This change has backport changes from
commit hash 6f73a20 (soc/intel/alderlake: Move CnviDdrRfim property to
drivers) and provides the CNVi RFIM support for Meteor Lake.

BUG=b:248391777
TEST=Booted to OS on Rex. Looked the DDR_DVFS_RFI_CONFIG_PCU_REG
register at the offset 0x5A40 of Mchbar and verified the BIT0
(RFI_DISABLE bit) is 0.

Change-Id: I87110bc10b98a27a8f274680597b15a1df488824
Signed-off-by: zhaojohn 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67789
Reviewed-by: Subrata Banik 
Tested-by: build bot (Jenkins) 
Reviewed-by: Eric Lai 
Reviewed-by: Sumeet R Pawnikar 
Reviewed-by: Angel Pons 
---
M src/soc/intel/meteorlake/romstage/fsp_params.c
1 file changed, 43 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Sumeet R Pawnikar: Looks good to me, approved
  Angel Pons: Looks good to me, but someone else must approve
  Subrata Banik: Looks good to me, approved
  Eric Lai: Looks good to me, approved

diff --git a/src/soc/intel/meteorlake/romstage/fsp_params.c b/src/soc/intel/meteorlake/romstage/fsp_params.c
index 0ca3756..0b7e79e6 100644
--- a/src/soc/intel/meteorlake/romstage/fsp_params.c
+++ b/src/soc/intel/meteorlake/romstage/fsp_params.c
@@ -5,6 +5,7 @@
 #include <cpu/intel/cpu_ids.h>
 #include <cpu/x86/msr.h>
 #include <device/device.h>
+#include <drivers/wifi/generic/wifi.h>
 #include <fsp/fsp_debug_event.h>
 #include <fsp/util.h>
 #include <intelblocks/cpulib.h>
@@ -199,6 +200,19 @@
    memset(m_cfg->PchHdaAudioLinkSndwEnable, 0, sizeof(m_cfg->PchHdaAudioLinkSndwEnable));
 }

+static void fill_fspm_cnvi_params(FSP_M_CONFIG *m_cfg,
+		const struct soc_intel_meteorlake_config *config)
+{
+	/* CNVi DDR RFI Mitigation */
+	const struct device_path path[] = {
+		{ .type = DEVICE_PATH_PCI, .pci.devfn = PCI_DEVFN_CNVI_WIFI },
+		{ .type = DEVICE_PATH_GENERIC, .generic.id = 0 } };
+	const struct device *dev = find_dev_nested_path(pci_root_bus(), path,
+							ARRAY_SIZE(path));
+	if (is_dev_enabled(dev))
+		m_cfg->CnviDdrRfim = wifi_generic_cnvi_ddr_rfim_enabled(dev);
+}
+
 static void fill_fspm_ish_params(FSP_M_CONFIG *m_cfg,
    	const struct soc_intel_meteorlake_config *config)
 {
@@ -281,6 +295,7 @@
    	fill_fspm_smbus_params,
    	fill_fspm_misc_params,
    	fill_fspm_audio_params,
+		fill_fspm_cnvi_params,
    	fill_fspm_pcie_rp_params,
    	fill_fspm_ish_params,
    	fill_fspm_tcss_params,