Sheng-Liang Pan has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42564 )
Change subject: mb/google/octopus/variants/bobba: fix disable_xhci_lfps_pm by sku ......................................................................
mb/google/octopus/variants/bobba: fix disable_xhci_lfps_pm by sku
due to overridetree.cb set disable_xhci_lfps_pm = 0, need correct condition expression to let fuction work.
BUG=b:146768983 BRANCH=octopus TEST=build coreboot with DisableXhciLfpsPM being set to 1 and flash the image to the device. Run following command to check if bits[7:4] is set 0: >iotools mmio_read32 "XHCI MMIO BAR + 0x80A4"
Signed-off-by: Pan Sheng-Liang sheng-liang.pan@quanta.corp-partner.google.com Change-Id: I53621d7674a531adfa40e8703cb2cd01c50376b8 --- M src/mainboard/google/octopus/variants/bobba/variant.c 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/42564/1
diff --git a/src/mainboard/google/octopus/variants/bobba/variant.c b/src/mainboard/google/octopus/variants/bobba/variant.c index f011b65..97c77a9 100644 --- a/src/mainboard/google/octopus/variants/bobba/variant.c +++ b/src/mainboard/google/octopus/variants/bobba/variant.c @@ -82,7 +82,7 @@
cfg = (struct soc_intel_apollolake_config *)dev->chip_info;
- if (cfg != NULL && cfg->disable_xhci_lfps_pm) { + if (cfg != NULL && (cfg->disable_xhci_lfps_pm != 1)) { switch (google_chromeec_get_board_sku()) { case 37: case 38: