[coreboot-gerrit] [S] Change in coreboot[main]: soc/intel/snowridge: add CPU and PCIe definitions for SNR

[Shuo Liu (Code Review)]

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Change subject: soc/intel/snowridge: add CPU and PCIe definitions for SNR
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Patch Set 2:

(1 comment)

Commit Message:

https://review.coreboot.org/c/coreboot/+/83314/comment/5b4e16b3_1b11f05b?usp... :
PS2, Line 8: 
Add CPU and PCIe definitions for SNR