Martin Roth has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/56919 )
Change subject: soc/amd/common: Skip psp_verstage on S0i3 resume ......................................................................
soc/amd/common: Skip psp_verstage on S0i3 resume
BUG=b:177064859 TEST:Verify that S0i3 doesn't run on S0i3 resume
Signed-off-by: Martin Roth martinroth@chromium.org Change-Id: Ia7b2560ff3d7621922ec4bc0e8793961f5d7550f --- M src/soc/amd/common/psp_verstage/psp_verstage.c 1 file changed, 7 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/56919/1
diff --git a/src/soc/amd/common/psp_verstage/psp_verstage.c b/src/soc/amd/common/psp_verstage/psp_verstage.c index 5c59c4f..98df0a6 100644 --- a/src/soc/amd/common/psp_verstage/psp_verstage.c +++ b/src/soc/amd/common/psp_verstage/psp_verstage.c @@ -200,6 +200,13 @@ { uint32_t retval; struct vb2_context *ctx = NULL; + uint32_t bootmode = 0; + + /* Currently, we want to skip running verstage on all S0i3 resumes. This relies + on an assumption that the PSP will be checksumming all of its components. */ + svc_get_boot_mode(&bootmode); + if (bootmode == PSP_BOOT_MODE_S0i3_RESUME) + svc_exit(0);
/* * Do not use printk() before console_init()