Attention is currently required from: Fabian Groffen, Felix Singer, Patrick Rudolph.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/77046?usp=email )
Change subject: mb/gigabyte/ga-h77m-d3h: Add Sandy/Ivy Bridge board GA-H77M-D3H ......................................................................
Patch Set 7:
(8 comments)
File src/mainboard/gigabyte/ga-h77m-d3h/acpi/mainboard.asl:
https://review.coreboot.org/c/coreboot/+/77046/comment/bc3f171b_39d211a6 : PS7, Line 3: Scope (_SB) : { : Device (PWRB) : { : Name (_HID, EisaId ("PNP0C0C")) : } : } : Does this also come from the B75 board? I remember checking the ACPI spec, and there's no reason to declare the power button in ASL unless it needs custom logic. So this file can also be removed.
File src/mainboard/gigabyte/ga-h77m-d3h/acpi/pci.asl:
https://review.coreboot.org/c/coreboot/+/77046/comment/e608032b_5a227387 : PS7, Line 7: Name (_ADR, 0x001E0000)
I admit copying this from ga-b75m-d3h. I have that board too, and assumed this would be ok/correct. […]
Then I would simply remove this file
File src/mainboard/gigabyte/ga-h77m-d3h/acpi/thermal.asl:
PS7:
no, it's from the b75m variant with identical superio
I remember similar code caused ACPI errors for me on one of the H61 boards. I'd say it's best to remove it unless it can be tested.
File src/mainboard/gigabyte/ga-h77m-d3h/acpi_tables.c:
https://review.coreboot.org/c/coreboot/+/77046/comment/84d6c564_d52cb530 : PS7, Line 10: gnvs->tpsv = PASSIVE_TEMPERATURE; After removing `thermal.asl`, these values would no longer be used anywhere, so this entire can also be dropped.
File src/mainboard/gigabyte/ga-h77m-d3h/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/77046/comment/5081cc79_b4bcccc2 : PS7, Line 5: subsystemid 0x1458 0x5000
if you don't mind my asking, where is this inherited from? A git grep shows dozens of occurrences, […]
See this very file, two lines above this one.
File src/mainboard/gigabyte/ga-h77m-d3h/dsdt.asl:
https://review.coreboot.org/c/coreboot/+/77046/comment/5769f94f_484a01e2 : PS7, Line 10: // OEM revision
I created this port by adapting ga-b75m-d3h.
Still, it's most likely autoport copy-paste. I'd drop the comment anyway.
File src/mainboard/gigabyte/ga-h77m-d3h/early_init.c:
https://review.coreboot.org/c/coreboot/+/77046/comment/69f1543b_cc84aa00 : PS7, Line 21: ite_reg_write(SIO_GPIO, 0x25, 0x40); // gpio pin function -> gp16 : ite_reg_write(SIO_GPIO, 0x27, 0x10); // gpio pin function -> gp34 : ite_reg_write(SIO_GPIO, 0x2c, 0x80); // smbus isolation on parallel port : ite_reg_write(SIO_GPIO, 0x62, 0x0a); // simple iobase 0xa00 : ite_reg_write(SIO_GPIO, 0x72, 0x20); // watchdog timeout clear! : ite_reg_write(SIO_GPIO, 0x73, 0x00); // watchdog timeout clear! : ite_reg_write(SIO_GPIO, 0xcb, 0x00); // simple io set4 direction -> in : ite_reg_write(SIO_GPIO, 0xe9, 0x27); // bus select disable : ite_reg_write(SIO_GPIO, 0xf0, 0x10); // ? : ite_reg_write(SIO_GPIO, 0xf1, 0x42); // ? : ite_reg_write(SIO_GPIO, 0xf6, 0x1c); // hwmon alert beep -> gp36(pin12) : : /* EC SIO settings */ : ite_reg_write(IT8728F_EC, 0xf1, 0xc0); : ite_reg_write(IT8728F_EC, 0xf6, 0xf0); : ite_reg_write(IT8728F_EC, 0xf9, 0x48); : ite_reg_write(IT8728F_EC, 0x60, 0x0a); : ite_reg_write(IT8728F_EC, 0x61, 0x30); : ite_reg_write(IT8728F_EC, 0x62, 0x0a); : ite_reg_write(IT8728F_EC, 0x63, 0x20); : ite_reg_write(IT8728F_EC, 0x30, 0x01); Were these values copied as-is from the other board?
File src/mainboard/gigabyte/ga-h77m-d3h/gpio.c:
PS7: Was this file copied as-is from the other board? I hope not, because bad GPIO configuration can break things...
If so, flash vendor firmware and run autoport to generate this file.