Furquan Shaikh has submitted this change. ( https://review.coreboot.org/c/coreboot/+/44629 )
Change subject: mb/google/zork/var/ezkinil: Fix stylus GPIO to enable suspend ......................................................................
mb/google/zork/var/ezkinil: Fix stylus GPIO to enable suspend
Make GPIO_4 and GPIO_5 PAD_NC in ezkinil/gpio.c. None of the Ezkinil SKUs use internal stylus and hence pen pads are configured as NC.
BUG=b:164892883, b:165342107 TEST=Verified taht pen detect GPIO does not cause spurious wakes. BRANCH=None
Signed-off-by: Josie Nordrum josienordrum@google.com Change-Id: I7557575cf8b8e0f849e05bda1d69acf61e91a157 Reviewed-on: https://review.coreboot.org/c/coreboot/+/44629 Reviewed-by: Furquan Shaikh furquan@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/google/zork/variants/ezkinil/gpio.c 1 file changed, 12 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved
diff --git a/src/mainboard/google/zork/variants/ezkinil/gpio.c b/src/mainboard/google/zork/variants/ezkinil/gpio.c index f8664bb..108a134 100644 --- a/src/mainboard/google/zork/variants/ezkinil/gpio.c +++ b/src/mainboard/google/zork/variants/ezkinil/gpio.c @@ -8,6 +8,10 @@ #include <ec/google/chromeec/ec.h>
static const struct soc_amd_gpio ezkinil_bid1_gpio_set_stage_ram[] = { + /* PEN_DETECT_ODL - Not connected */ + PAD_NC(GPIO_4), + /* PEN_POWER_EN - Not connected */ + PAD_NC(GPIO_5), /* DMIC_SEL */ PAD_GPO(GPIO_13, LOW), // Select Camera 1 Dmic /* USB_OC4_L - USB_A1 */ @@ -29,6 +33,10 @@ };
static const struct soc_amd_gpio ezkinil_bid2_gpio_set_stage_ram[] = { + /* PEN_DETECT_ODL - Not connected */ + PAD_NC(GPIO_4), + /* PEN_POWER_EN - Not connected */ + PAD_NC(GPIO_5), /* FPMCU_RST_L Change NC */ PAD_NC(GPIO_11), /* DMIC_SEL */ @@ -50,6 +58,10 @@ };
static const struct soc_amd_gpio ezkinil_bid3_gpio_set_stage_ram[] = { + /* PEN_DETECT_ODL - Not connected */ + PAD_NC(GPIO_4), + /* PEN_POWER_EN - Not connected */ + PAD_NC(GPIO_5), /* FPMCU_RST_L Change NC */ PAD_NC(GPIO_11), /* FPMCU_BOOT0 Change NC */