Attention is currently required from: Martin Roth, Ran Bi, Yidi Lin. Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49677 )
Change subject: soc/mediatek/mt8192: add clkbuf and srclken_rc MT6359P driver ......................................................................
Patch Set 1:
(3 comments)
File src/soc/mediatek/mt8192/srclken_rc.c:
https://review.coreboot.org/c/coreboot/+/49677/comment/ec4f45b5_c9eb6224 PS1, Line 283: write32(&rc_regs->rc_central_cfg1, : _BF_VALUE(DCXO_SETTLE_T, DCXO_SETTLE_TIME) | : _BF_VALUE(NON_DCXO_SETTLE_T, XO_SETTLE_TIME) | : _BF_VALUE(ULPOSC_SETTLE_T, ULPOSC_SETTLE_TIME) | : _BF_VALUE(VCORE_SETTLE_T, VCORE_SETTLE_TIME) | : _BF_VALUE(SRCLKEN_RC_EN_SEL, SRCLKEN_RC_EN_SEL_VAL) | : _BF_VALUE(RC_SPI_ACTIVE, KEEP_RC_SPI_ACTIVE_VAL) | : _BF_VALUE(RCEN_ISSUE_M, IS_SPI2PMIC_SET_CLR) | : _BF_VALUE(SRCLKEN_RC_EN, RC_CENTRAL_DISABLE)); Why don't we just call
WRITE32_BITFIELDS(&rc_regs->rc_central_cfg1, DXCO_SETTLE_T, DCXO_SETTITLE_TIME, ....)
https://review.coreboot.org/c/coreboot/+/49677/comment/e12d760e_da811a2e PS1, Line 294: write32 WRITE32_BITFIELDS
https://review.coreboot.org/c/coreboot/+/49677/comment/98dfd63c_8c35ae93 PS1, Line 364: 0xa Can you define a bitfield for 0xa and then use READ32_BITFIELD?