[coreboot-gerrit] Change in coreboot[master]: soc/intel/jasperlake: Add the SkipCpuReplacementCheck configuration

[V Sowmya (Code Review)]

V Sowmya has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42453 )

Change subject: soc/intel/jasperlake: Add the SkipCpuReplacementCheck configuration
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Patch Set 4:

(1 comment)

https://review.coreboot.org/c/coreboot/+/42453/4/src/soc/intel/jasperlake/ch... 
File src/soc/intel/jasperlake/chip.h:

https://review.coreboot.org/c/coreboot/+/42453/4/src/soc/intel/jasperlake/ch... 
PS4, Line 293: uint8_t SkipCpuReplacementCheck;
> Thanks Furquan for the explanation.

This UPD is valid, since on Intel RVP's we can still swap the silicon and in that case CSE reports that CPU is being replaced and a full MRC training will done.
Like Furquan mentioned, we have to set this UPD for the CSE Lite to support the downgrade feature and this change has been pushed for CML and TGL also.
Here is the crossbug that captures this discussion for CSE Lite BUG=b:154801654