Attention is currently required from: Hung-Te Lin, Jarried Lin, Xi Chen, Yidi Lin.
Hello Hung-Te Lin, Xi Chen, Yidi Lin, Yu-Ping Wu, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/83925?usp=email
to look at the new patch set (#12).
The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins)
Change subject: soc/mediatek/mt8196: Enable MMU operation for L2C SRAM and DMA ......................................................................
soc/mediatek/mt8196: Enable MMU operation for L2C SRAM and DMA
- Turn off L2C SRAM and reconfigure as L2 cache: Mediatek SoC uses part of the L2 cache as SRAM before DRAM is ready. After DRAM is ready, we should invoke disable_l2c_sram to reconfigure the L2C SRAM as L2 cache.
- Configure DMA buffer in DRAM: Set DRAM DMA to be non-cacheable to load blob correctly.
TEST=build pass, register(disable_l2c) read ok BUG=b:317009620
Change-Id: I6a3cb63d3418f085f5d8d08b282dd59ea431c294 Signed-off-by: Jarried Lin jarried.lin@mediatek.corp-partner.google.com --- M src/soc/mediatek/mt8196/Makefile.mk A src/soc/mediatek/mt8196/l2c_ops.c M src/soc/mediatek/mt8196/soc.c 3 files changed, 51 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/83925/12