Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Paul Menzel, Felix Held. Fred Reitberger has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61559 )
Change subject: soc/amd/sabrina: Move EFS into FMAP section ......................................................................
Patch Set 2:
(6 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/61559/comment/5ef90622_d8132454 PS1, Line 7: Moving
Please use imperative mood: Move ….
done
https://review.coreboot.org/c/coreboot/+/61559/comment/20f42ede_34580e70 PS1, Line 9: The chausie mainboard uses the first 128kByte of SPI flash for the EC : firmware.
And this conflicts with EFS?
Added more details in the commit message. If the EC uses the entire first 128kB of flash, there is no room to fit the EFS inside a CBFS that starts at 128kB. The EFS is moved out of CBFS using FMAP so that it can be located at the 128kB offset it wants to be at.
Patchset:
PS1:
i'd split this patch into a soc code change and a board code change on top of the soc code patch
done
PS1:
you'll also need to change the chromeos fmd file in order for the build test to pass; that is the on […]
changed the config to not enable this on chromeos
Patchset:
PS2: Updates per comments
File src/mainboard/amd/chausie/board.fmd:
https://review.coreboot.org/c/coreboot/+/61559/comment/ad48ae2b_d6e0cd9f PS1, Line 4: 3M
Just FYI, we won't be able to use this on ChromeOS. The EFS header needs to be in the RO section.
In the next patch, I set it so that this option is not enabled for ChromeOS