[coreboot-gerrit] [S] Change in blobs[main]: soc/mediatek/mt8186: Update DRAM binary from 0.1.0 to 0.1.1

[Xixi Chen (Code Review)]

Attention is currently required from: Paul Menzel, Yidi Lin, Yu-Ping Wu.

Xixi Chen has posted comments on this change by Xixi Chen. ( https://review.coreboot.org/c/blobs/+/83748?usp=email )

Change subject: soc/mediatek/mt8186: Update DRAM binary from 0.1.0 to 0.1.1
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Patch Set 6:

(5 comments)

Commit Message:

https://review.coreboot.org/c/blobs/+/83748/comment/d43f6a42_eddf40cb?usp=em... :
PS5, Line 9: readed
> read

Done

https://review.coreboot.org/c/blobs/+/83748/comment/2797545f_fa07db45?usp=em... :
PS5, Line 12: value(from full-k reference)
> Please add a space before (.

Done

https://review.coreboot.org/c/blobs/+/83748/comment/6325e760_d103f553?usp=em... :
PS5, Line 12: let
> make?

Done

https://review.coreboot.org/c/blobs/+/83748/comment/a595a3dc_96972060?usp=em... :
PS5, Line 9: For fast-k RX flow, Vref value is readed from the MRC_CACHE, but the
           : preferred RX Vref value 0xE is set, with no re-calibration. But some
           : DRAM vendor may use higher RX Vref value, increase the default RX
           : Vref value(from full-k reference) to let different DRAM RX Vref
           : compatible.
           :
> Please make use of 72 characters per line.

Acknowledged

https://review.coreboot.org/c/blobs/+/83748/comment/cd074551_b450ff46?usp=em... :
PS5, Line 16: TEST=Check the fast-k RX Vref value is normal
> How? What DRAM vendor/model?

Done