Attention is currently required from: Sean Rhodes, Patrick Rudolph. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58149 )
Change subject: soc/intel/*/me.c: Check more than PCI interface for printing ME info ......................................................................
Patch Set 1:
(1 comment)
File src/soc/intel/alderlake/me.c:
https://review.coreboot.org/c/coreboot/+/58149/comment/2e648d7c_0ddfd28e PS1, Line 103: !cse_is_hfs1_cws_normal() || : !cse_is_hfs1_com_normal() || : !cse_is_hfs1_com_soft_temp_disable()) : return; I disagree here, this is important status information to have on every boot, especially when it's not in normal states! 😊
If you really need to skip dumping these registers, then perhaps the new CMOS option you added would work here? was it `me_state` ?