[coreboot-gerrit] Change in coreboot[master]: drivers/spi/tpm: Enable long cr50 ready pulses for Tiger Lake systems

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43741 )

Change subject: drivers/spi/tpm: Enable long cr50 ready pulses for Tiger Lake systems
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Patch Set 21:

(1 comment)

https://review.coreboot.org/c/coreboot/+/43741/21/src/drivers/spi/tpm/tpm.c 
File src/drivers/spi/tpm/tpm.c:

https://review.coreboot.org/c/coreboot/+/43741/21/src/drivers/spi/tpm/tpm.c@... 
PS21, Line 439: 	if (version[0] > 0 || version[1] >= 7 || (version[1] >= 5 && version[2] >= 5)) {
braces {} are not necessary for single statement blocks