Paul Fagerburg has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/34765 )
Change subject: kohaku: add TEMP_SENSOR_3 and TEMP_SENSOR_4 to DPTF ......................................................................
kohaku: add TEMP_SENSOR_3 and TEMP_SENSOR_4 to DPTF
The Kohaku V24 schematic adds two additional temperature sensors to the EC. Add these to the DPTF tables. Note that this requires changes in both the EC and BIOS.
BRANCH=none BUG=b:138578073 TEST=Rebuild EC and BIOS, look for new thermal sensors in kernel. 1. Build EC ``cd ~/trunk/src/platform/ec`` ``make -j BOARD=kohaku`` 2. Program EC ``./util/flash_ec --board=kohaku`` 3. Reboot device 4. Rebuild BIOS ``cd ~/trunk/src/third_party/coreboot`` ``FEATURES="noclean" FW_NAME=kohaku emerge-hatch chromeos-ec depthcharge vboot_reference libpayload coreboot-private-files intel-cmlfsp coreboot-private-files-hatch coreboot chromeos-bootimage`` 5. Use flashrom to program the BIOS 6. Reboot device 7. Log into the root console (ctrl-alt-F2 or servo) 8. Example thermal sensor information ``grep . /sys/class/thermal/t*/type`` Look for "TSR0" through "TSR3" in the output.
Change-Id: Ib8f38beae6392855927ce1249c229d7a114c72b2 Signed-off-by: Paul Fagerburg pfagerburg@chromium.org --- M src/mainboard/google/hatch/variants/kohaku/include/variant/acpi/dptf.asl 1 file changed, 20 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/34765/1
diff --git a/src/mainboard/google/hatch/variants/kohaku/include/variant/acpi/dptf.asl b/src/mainboard/google/hatch/variants/kohaku/include/variant/acpi/dptf.asl index 06df7b1..7a90a9a 100644 --- a/src/mainboard/google/hatch/variants/kohaku/include/variant/acpi/dptf.asl +++ b/src/mainboard/google/hatch/variants/kohaku/include/variant/acpi/dptf.asl @@ -26,6 +26,16 @@ #define DPTF_TSR1_PASSIVE 65 #define DPTF_TSR1_CRITICAL 75
+#define DPTF_TSR2_SENSOR_ID 1 +#define DPTF_TSR2_SENSOR_NAME "Thermal Sensor 3" +#define DPTF_TSR2_PASSIVE 65 +#define DPTF_TSR2_CRITICAL 75 + +#define DPTF_TSR3_SENSOR_ID 1 +#define DPTF_TSR3_SENSOR_NAME "Thermal Sensor 4" +#define DPTF_TSR3_PASSIVE 65 +#define DPTF_TSR3_CRITICAL 75 + #define DPTF_ENABLE_CHARGER
/* Charger performance states, board-specific values from charger and EC */ @@ -40,11 +50,17 @@ /* CPU Throttle Effect on CPU */ Package () { _SB.PCI0.TCPU, _SB.PCI0.TCPU, 100, 50, 0, 0, 0, 0 },
- /* CPU Throttle Effect on Ambient (TSR0) */ - Package () { _SB.PCI0.TCPU, _SB.DPTF.TSR0, 100, 94, 0, 0, 0, 0 }, + /* CPU Throttle Effect on 5V (TSR1) */ + Package () { _SB.PCI0.TCPU, _SB.DPTF.TSR1, 100, 94, 0, 0, 0, 0 },
- /* Charger Throttle Effect on Charger (TSR1) */ - Package () { _SB.DPTF.TCHG, _SB.DPTF.TSR1, 100, 60, 0, 0, 0, 0 }, + /* Charger Throttle Effect on Charger (TSR0) */ + Package () { _SB.DPTF.TCHG, _SB.DPTF.TSR0, 100, 60, 0, 0, 0, 0 }, + + /* CPU Throttle Effect on IA (TSR2) */ + Package () { _SB.PCI0.TCPU, _SB.DPTF.TSR2, 100, 94, 0, 0, 0, 0 }, + + /* CPU Throttle Effect on GT (TSR3) */ + Package () { _SB.PCI0.TCPU, _SB.DPTF.TSR3, 100, 94, 0, 0, 0, 0 }, })
Name (MPPC, Package ()