Attention is currently required from: Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Kapil Porwal, Paul Menzel, Tarun, Tyler Wang.
Hello Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Kapil Porwal, Tarun, Tyler Wang, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/80663?usp=email
to look at the new patch set (#3).
Change subject: mb/google/rex/var/karis: Refactor SSD power sequencing ......................................................................
mb/google/rex/var/karis: Refactor SSD power sequencing
Improve SSD readiness time by enabling earlier power sequencing.
Here are the two GPIOs to look for: * GPP_A19: Power Enable * GPP_A20: PERST
The flow is presented as `stage (GPIO PAD/Value)` for easy understanding:
bootblock (A20/0, A19/1) | v romstage (A20/1) | v ramstage (A19/1, A20/1)
Ideally, we don't need SSD power sequencing at ramstage, but due to the fact that Karis has RO locked, any change in the bootblock won't be applicable for FSI'ed screebo devices. Therefore, we're keeping the existing ramstage power sequencing flow as is
TEST=Able to build and boot google/karis using NVMe without any problems. S0ix and read/write from/to SSD are also normal.
Change-Id: I79171a7830b75f5c20bbe30023f2814a62743a13 Signed-off-by: Subrata Banik subratabanik@google.com --- M src/mainboard/google/rex/variants/karis/gpio.c 1 file changed, 6 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/80663/3