Patrick Georgi (pgeorgi@google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10998
-gerrit
commit fa8cf3fc81cd428729c3ea61af8118701f293c95 Author: Naveen Krishna Chatradhi naveenkrishna.ch@intel.com Date: Wed Jul 8 14:23:06 2015 +0530
console: Add UART8250MEM 32bit support
This patch adds UART8250MEM_32 feature flag to support UART8250 compatible with 32bit access in memory mapped mode.
[pg: rebuilt to reuse the existing UART8250 8bit access driver which reduces code duplication.]
Change-Id: I310e70dfab81dcca575e9931e0ccf93af70efa40 Signed-off-by: Patrick Georgi pgeorgi@chromium.org Original-Commit-Id: 0c3b2c628b854e8334540ff5158c2587dbfabf95 Original-Change-Id: I07ee256f25e48480372af9a9255bf487c331e51d Original-Signed-off-by: Rishavnath Satapathy rishavnath.satapathy@intel.com Original-Signed-off-by: Naveen Krishna Chatradhi naveenkrishna.ch@intel.com Original-Reviewed-on: https://chromium-review.googlesource.com/271759 Original-Reviewed-by: Aaron Durbin adurbin@chromium.org Original-Tested-by: Wenkai Du wenkai.du@intel.com Original-Commit-Queue: Wenkai Du wenkai.du@intel.com --- src/drivers/uart/Kconfig | 5 +++++ src/drivers/uart/uart8250mem.c | 12 ++++++++++++ 2 files changed, 17 insertions(+)
diff --git a/src/drivers/uart/Kconfig b/src/drivers/uart/Kconfig index fef745e..cbfd479 100644 --- a/src/drivers/uart/Kconfig +++ b/src/drivers/uart/Kconfig @@ -17,6 +17,11 @@ config DRIVERS_UART_8250MEM bool default n
+config DRIVERS_UART_8250MEM_32 + bool + default n + depends on DRIVERS_UART_8250MEM + config HAVE_UART_SPECIAL bool default n diff --git a/src/drivers/uart/uart8250mem.c b/src/drivers/uart/uart8250mem.c index 2f341f2..d276fd0 100644 --- a/src/drivers/uart/uart8250mem.c +++ b/src/drivers/uart/uart8250mem.c @@ -34,6 +34,17 @@ #define SINGLE_CHAR_TIMEOUT (50 * 1000) #define FIFO_TIMEOUT (16 * SINGLE_CHAR_TIMEOUT)
+#if IS_ENABLED(CONFIG_DRIVERS_UART_8250MEM_32) +static uint8_t uart8250_read(void *base, uint8_t reg) +{ + return read32(base + 4 * reg) & 0xff; +} + +static void uart8250_write(void *base, uint8_t reg, uint8_t data) +{ + write32(base + 4 * reg, data); +} +#else static uint8_t uart8250_read(void *base, uint8_t reg) { return read8(base + reg); @@ -43,6 +54,7 @@ static void uart8250_write(void *base, uint8_t reg, uint8_t data) { write8(base + reg, data); } +#endif
static int uart8250_mem_can_tx_byte(void *base) {