Kyösti Mälkki has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/34747 )
Change subject: cpu/x86/smm: Drop SMI handler address from struct ......................................................................
cpu/x86/smm: Drop SMI handler address from struct
Change-Id: Ib925b11ba269e0f3a9a0a7550705bf2a6794c5b1 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/34747 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Aaron Durbin adurbin@chromium.org --- M src/soc/intel/cannonlake/include/soc/smm.h M src/soc/intel/cannonlake/smmrelocate.c M src/soc/intel/icelake/include/soc/smm.h M src/soc/intel/icelake/smmrelocate.c M src/soc/intel/skylake/include/soc/smm.h M src/soc/intel/skylake/smmrelocate.c 6 files changed, 6 insertions(+), 15 deletions(-)
Approvals: build bot (Jenkins): Verified Aaron Durbin: Looks good to me, approved
diff --git a/src/soc/intel/cannonlake/include/soc/smm.h b/src/soc/intel/cannonlake/include/soc/smm.h index 5f51fa2..e2367a7 100644 --- a/src/soc/intel/cannonlake/include/soc/smm.h +++ b/src/soc/intel/cannonlake/include/soc/smm.h @@ -29,8 +29,6 @@ } __packed;
struct smm_relocation_params { - uintptr_t smram_base; - size_t smram_size; uintptr_t ied_base; size_t ied_size; msr_t smrr_base; diff --git a/src/soc/intel/cannonlake/smmrelocate.c b/src/soc/intel/cannonlake/smmrelocate.c index 4ae383e..9a23d5a 100644 --- a/src/soc/intel/cannonlake/smmrelocate.c +++ b/src/soc/intel/cannonlake/smmrelocate.c @@ -188,7 +188,6 @@ phys_bits = cpu_phys_address_size();
smm_region(&tseg_base, &tseg_size); - smm_subregion(SMM_SUBREGION_HANDLER, ¶ms->smram_base, ¶ms->smram_size); smm_subregion(SMM_SUBREGION_CHIPSET, ¶ms->ied_base, ¶ms->ied_size);
/* SMRR has 32-bits of valid address aligned to 4KiB. */ @@ -248,11 +247,11 @@
fill_in_relocation_params(&smm_reloc_params);
+ smm_subregion(SMM_SUBREGION_HANDLER, perm_smbase, perm_smsize); + if (smm_reloc_params.ied_size) setup_ied_area(&smm_reloc_params);
- *perm_smbase = smm_reloc_params.smram_base; - *perm_smsize = smm_reloc_params.smram_size; *smm_save_state_size = sizeof(em64t101_smm_state_save_area_t); }
diff --git a/src/soc/intel/icelake/include/soc/smm.h b/src/soc/intel/icelake/include/soc/smm.h index 498a221..2d4adf7 100644 --- a/src/soc/intel/icelake/include/soc/smm.h +++ b/src/soc/intel/icelake/include/soc/smm.h @@ -28,8 +28,6 @@ } __packed;
struct smm_relocation_params { - uintptr_t smram_base; - size_t smram_size; uintptr_t ied_base; size_t ied_size; msr_t smrr_base; diff --git a/src/soc/intel/icelake/smmrelocate.c b/src/soc/intel/icelake/smmrelocate.c index 11745b0..edda540 100644 --- a/src/soc/intel/icelake/smmrelocate.c +++ b/src/soc/intel/icelake/smmrelocate.c @@ -187,7 +187,6 @@ phys_bits = cpu_phys_address_size();
smm_region(&tseg_base, &tseg_size); - smm_subregion(SMM_SUBREGION_HANDLER, ¶ms->smram_base, ¶ms->smram_size); smm_subregion(SMM_SUBREGION_CHIPSET, ¶ms->ied_base, ¶ms->ied_size);
/* SMRR has 32-bits of valid address aligned to 4KiB. */ @@ -247,11 +246,11 @@
fill_in_relocation_params(&smm_reloc_params);
+ smm_subregion(SMM_SUBREGION_HANDLER, perm_smbase, perm_smsize); + if (smm_reloc_params.ied_size) setup_ied_area(&smm_reloc_params);
- *perm_smbase = smm_reloc_params.smram_base; - *perm_smsize = smm_reloc_params.smram_size; *smm_save_state_size = sizeof(em64t101_smm_state_save_area_t); }
diff --git a/src/soc/intel/skylake/include/soc/smm.h b/src/soc/intel/skylake/include/soc/smm.h index b2debe8..9c15db2 100644 --- a/src/soc/intel/skylake/include/soc/smm.h +++ b/src/soc/intel/skylake/include/soc/smm.h @@ -30,8 +30,6 @@ } __packed;
struct smm_relocation_params { - uintptr_t smram_base; - size_t smram_size; uintptr_t ied_base; size_t ied_size; msr_t smrr_base; diff --git a/src/soc/intel/skylake/smmrelocate.c b/src/soc/intel/skylake/smmrelocate.c index 42d15b7..9bc599a 100644 --- a/src/soc/intel/skylake/smmrelocate.c +++ b/src/soc/intel/skylake/smmrelocate.c @@ -197,7 +197,6 @@ phys_bits = cpuid_eax(0x80000008) & 0xff;
smm_region(&tseg_base, &tseg_size); - smm_subregion(SMM_SUBREGION_HANDLER, ¶ms->smram_base, ¶ms->smram_size); smm_subregion(SMM_SUBREGION_CHIPSET, ¶ms->ied_base, ¶ms->ied_size);
/* SMRR has 32-bits of valid address aligned to 4KiB. */ @@ -257,11 +256,11 @@
fill_in_relocation_params(&smm_reloc_params);
+ smm_subregion(SMM_SUBREGION_HANDLER, perm_smbase, perm_smsize); + if (smm_reloc_params.ied_size) setup_ied_area(&smm_reloc_params);
- *perm_smbase = smm_reloc_params.smram_base; - *perm_smsize = smm_reloc_params.smram_size; *smm_save_state_size = sizeof(em64t101_smm_state_save_area_t); }