[coreboot-gerrit] Change in coreboot[master]: mb/ocp/tiogapass: Add SMBIOS type8 data table

[Bryant Ou (Code Review)]

Bryant Ou has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/40547 )

Change subject: mb/ocp/tiogapass: Add SMBIOS type8 data table
......................................................................

mb/ocp/tiogapass: Add SMBIOS type8 data table

According to MP MB to port SMBIOS type8 data.

Tested=Use "dmidecoe -t 8" to dump SMBIOS data,
and check if type8 tables are implemented.

Change-Id: I356e645774d78c623c1398c8b1473562e1529cf2
Signed-off-by: BryantOu 
---
M src/mainboard/ocp/tiogapass/ramstage.c
1 file changed, 130 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/40547/1

diff --git a/src/mainboard/ocp/tiogapass/ramstage.c b/src/mainboard/ocp/tiogapass/ramstage.c
index 16b4fd9..a6ca01d 100644
--- a/src/mainboard/ocp/tiogapass/ramstage.c
+++ b/src/mainboard/ocp/tiogapass/ramstage.c
@@ -16,11 +16,141 @@
 #include <bootstate.h>
 #include <gpio.h>
 #include <soc/lewisburg_pch_gpio_defs.h>
+#include <smbios.h>

void mainboard_silicon_init_params(FSPS_UPD *params)
 {
 }

+static const struct port_information SMBIOS_type8_info[] = {
+	/*
+	* Port Information fields:
+	* 	Internal Reference Designator,
+	* 	Internal Connector Type,
+	* 	External Reference Designator,
+	* 	External Connector_Type,
+	* 	Port Type
+	*/
+	{
+		"J7F5 - BMC JTAG HEADER",
+		CONN_OTHER,
+		0,
+		CONN_NONE,
+		TYPE_OTHER
+	},
+	{
+		"J8A1 - MINISAS1",
+		CONN_SAS_SATA,
+		0,
+		CONN_NONE,
+		TYPE_SAS
+	},
+	{
+		"J8A2 - MINISAS2",
+		CONN_SAS_SATA,
+		0,
+		CONN_NONE,
+		TYPE_SAS
+	},
+	{
+		"J8A3 - SATA CONBINE1",
+		CONN_SAS_SATA,
+		0,
+		CONN_NONE,
+		TYPE_SAS
+	},
+	{
+		"J8B1 - ME_DBG",
+		CONN_OTHER,
+		0,
+		CONN_NONE,
+		TYPE_OTHER
+	},
+	{
+		"J8D1 - VR_DBG",
+		CONN_OTHER,
+		0,
+		CONN_NONE,
+		TYPE_OTHER
+	},
+	{
+		"J8E1 - TPM_MODULE",
+		CONN_OTHER,
+		0,
+		CONN_NONE,
+		TYPE_OTHER
+	},
+	{
+		"J8F1 - M.2 CONNECTOR",
+		CONN_OTHER,
+		0,
+		CONN_NONE,
+		TYPE_OTHER
+	},
+	{
+		"J9A1 - SATA RAID KEY",
+		CONN_OTHER,
+		0,
+		CONN_NONE,
+		TYPE_OTHER
+	},
+	{
+		0,
+		CONN_NONE,
+		"J9A2 - DEBUG 80 PORT",
+		CONN_OTHER,
+		TYPE_OTHER
+	},
+	{
+		"J9A3 - CPU & PCH XDP",
+		CONN_OTHER,
+		0,
+		CONN_NONE,
+		TYPE_OTHER
+	},
+	{
+		0,
+		CONN_NONE,
+		"J9A5 - USB conn",
+		CONN_ACCESS_BUS_USB,
+		TYPE_USB
+	},
+	{
+		"J9B1 - BMC_DBG",
+		CONN_OTHER,
+		0,
+		CONN_NONE,
+		TYPE_OTHER
+	},
+	{
+		0,
+		CONN_NONE,
+		"J9D1 - USB3.0 TYPE C",
+		CONN_ACCESS_BUS_USB,
+		TYPE_USB
+	},
+	{
+		0,
+		CONN_NONE,
+		"J9E1 - VGA",
+		CONN_OTHER,
+		TYPE_OTHER
+	},
+	{
+		0,
+		CONN_NONE,
+		"JA9G1 - ETH0",
+		CONN_RJ_45,
+		TYPE_NETWORK_PORT
+	},
+};
+
+const struct port_information *__weak smbios_get_port_info(size_t *num_port)
+{
+	*num_port = ARRAY_SIZE(SMBIOS_type8_info);
+	return SMBIOS_type8_info;
+}
+
 static void pull_post_complete_pin(void *unused)
 {
    /* Pull Low post complete pin */