Anshul Bansal has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/62960 )
Change subject: [Add slopes, enable rth and energyreport] ......................................................................
[Add slopes, enable rth and energyreport]
Reported-by: Bansal, Anshul anshul.bansal@intel.com Signed-off-by: Bansal, Anshul anshul.bansal@intel.com Change-Id: Ib7f3ef009914f91e5f1ced858871b423e5a225b0 --- M src/soc/intel/alderlake/fsp_params.c 1 file changed, 6 insertions(+), 9 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/62960/1
diff --git a/src/soc/intel/alderlake/fsp_params.c b/src/soc/intel/alderlake/fsp_params.c index 3cefc40..51af6e0 100755 --- a/src/soc/intel/alderlake/fsp_params.c +++ b/src/soc/intel/alderlake/fsp_params.c @@ -722,15 +722,12 @@ s_cfg->PsysPmax = config->platform_pmax * 8; }
- s_cfg->C1StateAutoDemotion = !config->disable_c1_state_auto_demotion; - - s_cfg->PchPmDisableEnergyReport = 0x0; - s_cfg->RaceToHalt = 0x1; - s_cfg->ImonSlope[0] = 143; - s_cfg->ImonSlope[1] = 103; - s_cfg->VccInAuxImonSlope = 111; - - + s_cfg->C1StateAutoDemotion = !config->disable_c1_state_auto_demotion; + s_cfg->PchPmDisableEnergyReport = 0x0; + s_cfg->RaceToHalt = 0x1; + s_cfg->ImonSlope[0] = 143; + s_cfg->ImonSlope[1] = 103; + s_cfg->VccInAuxImonSlope = 111; }
static void fill_fsps_irq_params(FSP_S_CONFIG *s_cfg,