[coreboot-gerrit] Patch merged into coreboot/master: 14b444b arm64: No need of invalidating cache line for secondary CPU stack

the following patch was just integrated into master:
commit 14b444b83be0fe3c3a7fc524265e64d535018049
Author: Furquan Shaikh 
Date:   Fri Nov 21 15:54:39 2014 -0800

arm64: No need of invalidating cache line for secondary CPU stack

With support for initializing registers based on values saved by primary CPU, we
    no longer need to invalidate secondary CPU stack cache lines. Before jumping to
    C environment, we enable caching and update the required registers.

BUG=chrome-os-partner:33962
    BRANCH=None
    TEST=Compiles and boots both CPU0 and CPU1 on ryu.

Change-Id: Ifee36302b5de25b909b4570a30ada8ecd742ab82
    Signed-off-by: Patrick Georgi 
    Original-Commit-Id: 0a0403d06b89dae30b7520747501b0521d16a6db
    Original-Signed-off-by: Furquan Shaikh 
    Original-Change-Id: I738250f948e912725264cba3e389602af7510e3e
    Original-Reviewed-on: https://chromium-review.googlesource.com/231563
    Original-Reviewed-by: Aaron Durbin 
    Original-Tested-by: Furquan Shaikh 
    Original-Commit-Queue: Furquan Shaikh 
    Reviewed-on: http://review.coreboot.org/9541
    Tested-by: build bot (Jenkins)
    Reviewed-by: Stefan Reinauer

See http://review.coreboot.org/9541 for details.

-gerrit