11 May
2020
11 May
'20
1:09 p.m.
Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41247 )
Change subject: soc/amd/common/block/lpc: Add lpc_initialize_spi_bar() ......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/41247/3/src/soc/amd/common/block/in... File src/soc/amd/common/block/include/amdblocks/lpc.h:
https://review.coreboot.org/c/coreboot/+/41247/3/src/soc/amd/common/block/in... PS3, Line 195: lpc_initialize_spi_bar Why are there two ways of setting the spi base? How about dropping the base param and renaming this to lpc_enable_spi_rom(uint32_t enable)?
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I3f270ba1745b4bb8a403f00cd069a02e21d444be
Gerrit-Change-Number: 41247
Gerrit-PatchSet: 3
Gerrit-Owner: Furquan Shaikh furquan@google.com
Gerrit-Reviewer: Aaron Durbin adurbin@chromium.org
Gerrit-Reviewer: Raul Rangel rrangel@chromium.org
Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org
Gerrit-Comment-Date: Mon, 11 May 2020 20:09:46 +0000
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