Attention is currently required from: Hung-Te Lin, Tianping Fang, Yu-Ping Wu.
Rex-BC Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60312 )
Change subject: soc/medaitek/mt8195: adjust USB phy shift value
......................................................................
Patch Set 4:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/60312/comment/e8f87dea_180150be
PS3, Line 9: a
an
Done
https://review.coreboot.org/c/coreboot/+/60312/comment/afad44b9_cacbad8e
PS3, Line 10: MT8195
can you explain why this is not a problem for 8183 and 8192? silicon design issue or?
it's a design issue for mt8195, and I have added this comment to commit message.
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