[coreboot-gerrit] [S] Change in coreboot[main]: mb/google/fatcat: Update Flash Map layout

[Subrata Banik (Code Review)]

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/84453?usp=email )

Change subject: mb/google/fatcat: Update Flash Map layout
......................................................................

mb/google/fatcat: Update Flash Map layout

This patch updates the fatcat flash map layout to accommodate the growth
in Panther Lake IFWI blobs over Meteor Lake.

Release FMD:
 SI_ALL: 8MB -> 9MB
 SI_BIOS: 24MB -> 23MB
   RW_UNUSED: 4MB -> 3MB

Debug FMD:
 SI_ALL: 8MB -> 9MB
 SI_BIOS: 24MB -> 23MB
   RW_UNUSED: 3MB -> 2MB

TEST=Able to build google/fatcat inside chroot.

Change-Id: I8febb4df5d3b3eb07ebff8e56a1ce2dfd2f52e7d
Signed-off-by: Subrata Banik 
---
M src/mainboard/google/fatcat/chromeos-debug-fsp.fmd
M src/mainboard/google/fatcat/chromeos.fmd
2 files changed, 6 insertions(+), 6 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/84453/1

diff --git a/src/mainboard/google/fatcat/chromeos-debug-fsp.fmd b/src/mainboard/google/fatcat/chromeos-debug-fsp.fmd
index 5b20f00..f34e495 100644
--- a/src/mainboard/google/fatcat/chromeos-debug-fsp.fmd
+++ b/src/mainboard/google/fatcat/chromeos-debug-fsp.fmd
@@ -1,9 +1,9 @@
 FLASH 32M {
-	SI_ALL 8M {
+	SI_ALL 9M {
    	SI_DESC 16K
    	SI_ME
    }
-	SI_BIOS 24M {
+	SI_BIOS 23M {
    	RW_SECTION_A 7680K {
    		VBLOCK_A 8K
    		FW_MAIN_A(CBFS)
@@ -32,7 +32,7 @@
    		RW_FWID_B 64
    	}
    	RW_LEGACY(CBFS) 1M
-		RW_UNUSED 3M
+		RW_UNUSED 2M
    	# Make WP_RO region align with SPI vendor
    	# memory protected range specification.
    	WP_RO 4M {
diff --git a/src/mainboard/google/fatcat/chromeos.fmd b/src/mainboard/google/fatcat/chromeos.fmd
index 77f5555..61dd8cc 100644
--- a/src/mainboard/google/fatcat/chromeos.fmd
+++ b/src/mainboard/google/fatcat/chromeos.fmd
@@ -1,9 +1,9 @@
 FLASH 32M {
-	SI_ALL 8M {
+	SI_ALL 9M {
    	SI_DESC 16K
    	SI_ME
    }
-	SI_BIOS 24M {
+	SI_BIOS 23M {
    	RW_SECTION_A 7M {
    		VBLOCK_A 8K
    		FW_MAIN_A(CBFS)
@@ -32,7 +32,7 @@
    		RW_FWID_B 64
    	}
    	RW_LEGACY(CBFS) 1M
-		RW_UNUSED 4M
+		RW_UNUSED 3M
    	# Make WP_RO region align with SPI vendor
    	# memory protected range specification.
    	WP_RO 4M {