Michał Żygowski has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/83497?usp=email )
Change subject: superio/ite: Remove custom ITE GPIO drivers and code ......................................................................
superio/ite: Remove custom ITE GPIO drivers and code
Since a generic ITE GPIO driver is available and in use, the existence of chips-specific drivers no longer make sense. Remove the dead code in favor of generic GPIO driver.
Change-Id: I7e031d12192af4bd47923d87c1d02c64f9c851a2 Signed-off-by: Michał Żygowski michal.zygowski@3mdeb.com --- M src/superio/ite/it8659e/it8659e.h M src/superio/ite/it8772f/Makefile.mk D src/superio/ite/it8772f/early_init.c M src/superio/ite/it8772f/it8772f.h 4 files changed, 0 insertions(+), 124 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/83497/1
diff --git a/src/superio/ite/it8659e/it8659e.h b/src/superio/ite/it8659e/it8659e.h index 4fa91e9..f6eda07 100644 --- a/src/superio/ite/it8659e/it8659e.h +++ b/src/superio/ite/it8659e/it8659e.h @@ -11,24 +11,4 @@ #define IT8659E_GPIO 0x07 /* GPIO */ #define IT8659E_CIR 0x0A /* CIR */
-/* GPIO Polarity Select: 1: Inverting, 0: Non-inverting */ -#define GPIO_REG_POLARITY(x) (0xb0 + (x)) -#define GPIO_POL_NO_INVERT 0 -#define GPIO_POL_INVERT 1 - -/* GPIO Internal Pull-up: 1: Enable, 0: Disable */ -#define GPIO_REG_PULLUP(x) (0xb8 + (x)) -#define GPIO_PULLUP_DIS 0 -#define GPIO_PULLUP_EN 1 - -/* GPIO Function Select: 1: Simple I/O, 0: Alternate function */ -#define GPIO_REG_ENABLE(x) (0xc0 + (x)) -#define GPIO_ALT_FN 0 -#define GPIO_SIMPLE_IO 1 - -/* GPIO Mode: 0: input mode, 1: output mode */ -#define GPIO_REG_OUTPUT(x) (0xc8 + (x)) -#define GPIO_INPUT_MODE 0 -#define GPIO_OUTPUT_MODE 1 - #endif /* SUPERIO_ITE_IT8659E_H */ diff --git a/src/superio/ite/it8772f/Makefile.mk b/src/superio/ite/it8772f/Makefile.mk index a96a862..93ea16d 100644 --- a/src/superio/ite/it8772f/Makefile.mk +++ b/src/superio/ite/it8772f/Makefile.mk @@ -1,6 +1,3 @@ # SPDX-License-Identifier: GPL-2.0-or-later
-bootblock-$(CONFIG_SUPERIO_ITE_IT8772F) += early_init.c -romstage-$(CONFIG_SUPERIO_ITE_IT8772F) += early_init.c ramstage-$(CONFIG_SUPERIO_ITE_IT8772F) += superio.c -smm-$(CONFIG_SUPERIO_ITE_IT8772F) += early_init.c diff --git a/src/superio/ite/it8772f/early_init.c b/src/superio/ite/it8772f/early_init.c deleted file mode 100644 index efbb035..0000000 --- a/src/superio/ite/it8772f/early_init.c +++ /dev/null @@ -1,63 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ - -#include <arch/io.h> -#include <device/pnp_def.h> -#include <device/pnp_ops.h> - -#include "it8772f.h" -#include "../common/ite.h" - -#define IT8772F_CONFIG_REG_CC 0x02 /* Configure Control (write-only). */ - -/* NOTICE: This file is deprecated, use ite/common instead */ - -static void it8772f_enter_conf(pnp_devfn_t dev) -{ - u16 port = dev >> 8; - - outb(0x87, port); - outb(0x01, port); - outb(0x55, port); - outb((port == 0x4e) ? 0xaa : 0x55, port); -} - -static void it8772f_exit_conf(pnp_devfn_t dev) -{ - pnp_write_config(dev, IT8772F_CONFIG_REG_CC, 0x02); -} - -/* Configure a set of GPIOs */ -void it8772f_gpio_setup(pnp_devfn_t dev, int set, u8 select, u8 polarity, - u8 pullup, u8 output, u8 enable) -{ - set--; /* Set 1 is offset 0 */ - it8772f_enter_conf(dev); - pnp_set_logical_device(dev); - if (set < 5) { - pnp_write_config(dev, GPIO_REG_SELECT(set), select); - pnp_write_config(dev, GPIO_REG_ENABLE(set), enable); - pnp_write_config(dev, GPIO_REG_POLARITY(set), polarity); - } - pnp_write_config(dev, GPIO_REG_OUTPUT(set), output); - pnp_write_config(dev, GPIO_REG_PULLUP(set), pullup); - it8772f_exit_conf(dev); -} - -/* Configure LED GPIOs */ -void it8772f_gpio_led(pnp_devfn_t dev,int set, u8 select, u8 polarity, u8 pullup, - u8 output, u8 enable, u8 led_pin_map, u8 led_freq) -{ - set--; /* Set 1 is offset 0 */ - it8772f_enter_conf(dev); - pnp_set_logical_device(dev); - if (set < 5) { - pnp_write_config(dev, IT8772F_GPIO_LED_BLINK1_PINMAP, led_pin_map); - pnp_write_config(dev, IT8772F_GPIO_LED_BLINK1_CONTROL, led_freq); - pnp_write_config(dev, GPIO_REG_SELECT(set), select); - pnp_write_config(dev, GPIO_REG_ENABLE(set), enable); - pnp_write_config(dev, GPIO_REG_POLARITY(set), polarity); - } - pnp_write_config(dev, GPIO_REG_OUTPUT(set), output); - pnp_write_config(dev, GPIO_REG_PULLUP(set), pullup); - it8772f_exit_conf(dev); -} diff --git a/src/superio/ite/it8772f/it8772f.h b/src/superio/ite/it8772f/it8772f.h index 4df21c5..f286923 100644 --- a/src/superio/ite/it8772f/it8772f.h +++ b/src/superio/ite/it8772f/it8772f.h @@ -11,42 +11,4 @@ #define IT8772F_GPIO 0x07 /* GPIO */ #define IT8772F_IR 0x0a /* Consumer IR */
- -/* GPIO interface */ -#define IT8772F_GPIO_LED_BLINK1_PINMAP 0xf8 - -#define SIO_GPIO_BLINK_GPIO10 0x08 -#define SIO_GPIO_BLINK_GPIO22 0x12 -#define SIO_GPIO_BLINK_GPIO45 0x25 - -#define IT8772F_GPIO_LED_BLINK1_CONTROL 0xf9 - -#define IT8772F_GPIO_BLINK_FREQUENCY_4_HZ (0<<1) -#define IT8772F_GPIO_BLINK_FREQUENCY_1_HZ (1<<1) -#define IT8772F_GPIO_BLINK_FREQUENCY_1_4_HZ (2<<1) -#define IT8772F_GPIO_BLINK_FREQUENCY_1_8_HZ (3<<1) - -#define GPIO_REG_SELECT(x) (0x25 + (x)) - -/* GPIO Polarity Select: 1: Inverting, 0: Non-inverting */ -#define GPIO_REG_POLARITY(x) (0xb0 + (x)) - -/* GPIO Internal Pull-up: 1: Enable, 0: Disable */ -#define GPIO_REG_PULLUP(x) (0xb8 + (x)) - -/* GPIO Function Select: 1: Simple I/O, 0: Alternate function */ -#define GPIO_REG_ENABLE(x) (0xc0 + (x)) - -/* GPIO Mode: 0: input mode, 1: output mode */ -#define GPIO_REG_OUTPUT(x) (0xc8 + (x)) - -#include <device/pnp_type.h> -#include <stdint.h> - -void it8772f_gpio_setup(pnp_devfn_t dev, int set, u8 select, u8 polarity, - u8 pullup, u8 output, u8 enable); - -void it8772f_gpio_led(pnp_devfn_t dev, int set, u8 select, u8 polarity, u8 pullup, - u8 output, u8 enable, u8 led_pin_map, u8 led_freq); - #endif /* SUPERIO_ITE_IT8772F_H */