Rizwan Qureshi has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31619
Change subject: soc/intel/cannonlake: Add ASL functions to manipulate RX/TX buffers ......................................................................
soc/intel/cannonlake: Add ASL functions to manipulate RX/TX buffers
Add a function in gpio ASL library to enable/disable pad Rx/Tx Buffers.
BUG=b:123350329
Change-Id: I6c40d79debb61b0c4e96e485b410d446b77d9cf6 Signed-off-by: Rizwan Qureshi rizwan.qureshi@intel.com --- M src/soc/intel/cannonlake/acpi/gpio_op.asl M src/soc/intel/cannonlake/include/soc/gpio_defs.h 2 files changed, 46 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/31619/1
diff --git a/src/soc/intel/cannonlake/acpi/gpio_op.asl b/src/soc/intel/cannonlake/acpi/gpio_op.asl index 0c89e99..e1cfe04 100644 --- a/src/soc/intel/cannonlake/acpi/gpio_op.asl +++ b/src/soc/intel/cannonlake/acpi/gpio_op.asl @@ -94,3 +94,45 @@ And (ShiftLeft (Arg1, GPIOPADMODE_SHIFT, Arg1), GPIOPADMODE_MASK, Arg1) Or (Local0, Arg1, VAL0) } + +/* + * Enable/Disable Tx buffer + * Arg0 - GPIO Number + * Arg1 - TxBuffer state + * 0 = Disable Tx Buffer + * 1 = Enable Tx Buffer + */ +Method (GTXE, 2, Serialized) +{ + OperationRegion (PREG, SystemMemory, GADD (Arg0), 4) + Field (PREG, AnyAcc, NoLock, Preserve) + { + VAL0, 32 + } + Arg1 = LNot (Arg1) + Store (VAL0, Local0) + And (Not (GPIOTXBUFDIS_MASK), Local0, Local0) + And (ShiftLeft (Arg1, GPIOTXBUFDIS_SHIFT, Arg1), GPIOTXBUFDIS_MASK, Arg1) + Or (Local0, Arg1, VAL0) +} + +/* + * Enable/Disable Rx buffer + * Arg0 - GPIO Number + * Arg1 - RxBuffer state + * 0 = Disable Rx Buffer + * 1 = Enable Rx Buffer + */ +Method (GRXE, 2, Serialized) +{ + OperationRegion (PREG, SystemMemory, GADD (Arg0), 4) + Field (PREG, AnyAcc, NoLock, Preserve) + { + VAL0, 32 + } + Arg1 = LNot (Arg1) + Store (VAL0, Local0) + And (Not (GPIORXBUFDIS_MASK), Local0, Local0) + And (ShiftLeft (Arg1, GPIORXBUFDIS_SHIFT, Arg1), GPIORXBUFDIS_MASK, Arg1) + Or (Local0, Arg1, VAL0) +} diff --git a/src/soc/intel/cannonlake/include/soc/gpio_defs.h b/src/soc/intel/cannonlake/include/soc/gpio_defs.h index e8b4f61..3399526 100644 --- a/src/soc/intel/cannonlake/include/soc/gpio_defs.h +++ b/src/soc/intel/cannonlake/include/soc/gpio_defs.h @@ -255,4 +255,8 @@ #define GPIOTXSTATE_MASK 0x1 #define GPIOPADMODE_MASK 0xC00 #define GPIOPADMODE_SHIFT 10 +#define GPIOTXBUFDIS_MASK 0x100 +#define GPIOTXBUFDIS_SHIFT 8 +#define GPIORXBUFDIS_MASK 0x200 +#define GPIORXBUFDIS_SHIFT 9 #endif