[coreboot-gerrit] Change in coreboot[master]: soc/amd/picasso/southbridge: make GPP clock outputs configurable

[Felix Held (Code Review)]

Hello build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/44889

to look at the new patch set (#2).

Change subject: soc/amd/picasso/southbridge: make GPP clock outputs configurable
......................................................................

soc/amd/picasso/southbridge: make GPP clock outputs configurable

Make the general purpose PCIe clock outputs configurable to be either
permanently enabled, permanently disabled or dynamically enabled via
their corresponding external #CLK_REQx pins in the board's devicetree.

BUG=b:149970243
BRANCH=zork

Change-Id: I3f5760c0b869e8a9416ba9b57d182a88a2eb5e44
Signed-off-by: Felix Held 
---
M src/soc/amd/picasso/chip.h
M src/soc/amd/picasso/include/soc/southbridge.h
M src/soc/amd/picasso/southbridge.c
3 files changed, 54 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/44889/2