[coreboot-gerrit] [XS] Change in coreboot[master]: soc/intel/apollolake: Switch to snake case for PmicVdd2Voltage

[Mario Scheithauer (Code Review)]

Attention is currently required from: Sean Rhodes.

Mario Scheithauer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/75857?usp=email )

Change subject: soc/intel/apollolake: Switch to snake case for PmicVdd2Voltage
......................................................................

soc/intel/apollolake: Switch to snake case for PmicVdd2Voltage

For a unification of the naming convension, change from pascal case to
snake case style for parameter 'PmicVdd2Voltage'.

Change-Id: I179b8f5b56c5bfe7f6fc3148e4c95954c0755ffd
Signed-off-by: Mario Scheithauer 
---
M src/soc/intel/apollolake/chip.c
M src/soc/intel/apollolake/chip.h
2 files changed, 2 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/75857/1

diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index 956a55b..5f9b346 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -622,7 +622,7 @@
    /*
     * Options to adjust PMIC Vdd2 voltage.
     */
-	silconfig->PmicVdd2Voltage = cfg->PmicVdd2Voltage;
+	silconfig->PmicVdd2Voltage = cfg->pmic_vdd2_voltage;

/* FSP should let coreboot set subsystem IDs, which are read/write-once */
    silconfig->SiSVID = 0;
diff --git a/src/soc/intel/apollolake/chip.h b/src/soc/intel/apollolake/chip.h
index 5a3aa88..2d6b079 100644
--- a/src/soc/intel/apollolake/chip.h
+++ b/src/soc/intel/apollolake/chip.h
@@ -204,7 +204,7 @@
     * + OR Value (15:8) + AND Value (7:0) through BUCK5_VID[3:2]:
     * 00=1.10v, 01=1.15v, 10=1.24v, 11=1.20v (default).
     */
-	uint32_t PmicVdd2Voltage;
+	uint32_t pmic_vdd2_voltage;

/* Option to enable VTD feature. Default is 0 which disables VTD
     * capability in FSP. Setting this option to 1 in devicetree will enable