3 Sep
2019
3 Sep
'19
1:38 a.m.
Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35187 )
Change subject: [NOTFORMERGE] soc/intel exit_car.S ......................................................................
Patch Set 1:
Is it intentional that soc/intel does not toggle cache-disable bit CR0.CD while doing CAR teardown? Or did I just not find it?
Also, are there some compelling reasons to support "config FSP_CAR" and late_car_teardown()?
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Gerrit-Project: coreboot
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Gerrit-Change-Id: Icd369029d9bbf0aa72923513952e1aacf88c0f40
Gerrit-Change-Number: 35187
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Gerrit-Owner: Kyösti Mälkki kyosti.malkki@gmail.com
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