[coreboot-gerrit] Change in coreboot[master]: soc/amd/cezanne: add ACPI CPPC support for AMD

[Felix Held (Code Review)]

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Julian Schroeder.
Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56188 )

Change subject: soc/amd/cezanne: add ACPI CPPC support for AMD
......................................................................

Patch Set 4:

(3 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/56188/comment/f0acb87b_405cd926 
PS4, Line 9: CollaborativeProcessorPerformanceControl
           : See also: uefi.org/specifications
           : This leverages the existing CPPC support and adds a
           : cppc init for AMD/Cezanne.
           : 
maybe:

This leverages the existing Collaborative Processor Performance Control
(CPPC) support and adds CPPC init for AMD/Cezanne.

File src/soc/amd/cezanne/cppc.c:

https://review.coreboot.org/c/coreboot/+/56188/comment/a250a63f_804d7159 
PS4, Line 168: int
unsigned int?

File src/soc/amd/cezanne/include/soc/cppc.h:

PS4: 
i'd put the msr number and bit defines in oc/amd/cezanne/include/soc/msr.h