Attention is currently required from: Chen, Gang C, Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Shuo Liu, Tim Chu.
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/82080?usp=email )
Change subject: soc/intel/xeon_sp/gnr: Support fast boot
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Patch Set 1: Code-Review+2
(1 comment)
Patchset:
PS1:
Sometimes it is needed to do full boot to retrain memory, e.g. when temperature has big change, when some DIMM is replaced, hence a VPD is needed to control this. Maybe we need to raise this VPD to OCP level and cover SPR as well?
If there is no particular demand for then just leave it? Setting the value at mb level and inside the soc code is a bit much ofc, but that's just cleanup after all.
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