Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/45150 )
Change subject: device: Allow configuring bus mastering for PCI bridges conditionally ......................................................................
device: Allow configuring bus mastering for PCI bridges conditionally
Change-Id: Ic7cacce28f473dda76ca203016dbb8e00149a990 Signed-off-by: Felix Singer felix.singer@secunet.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/45150 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Nico Huber nico.h@gmx.de --- M src/device/Kconfig M src/device/pci_device.c 2 files changed, 13 insertions(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved
diff --git a/src/device/Kconfig b/src/device/Kconfig index 777f3f5..d564f00 100644 --- a/src/device/Kconfig +++ b/src/device/Kconfig @@ -534,9 +534,20 @@
if PCI_ALLOW_BUS_MASTER
+config PCI_SET_BUS_MASTER_PCI_BRIDGES + bool "PCI bridges" + default y + help + Let coreboot configure bus mastering for PCI bridges. Enabling bus + mastering for a PCI bridge also allows it to forward requests from + downstream devices. Currently, payloads ignore this and only enable + bus mastering for the downstream device. Hence, this option is needed + for compatibility until payloads are fixed. + config PCI_ALLOW_BUS_MASTER_ANY_DEVICE bool "Any devices" default y + select PCI_SET_BUS_MASTER_PCI_BRIDGES help Allow coreboot to enable PCI bus mastering for any device. The actual selection of devices depends on the various PCI drivers in coreboot. diff --git a/src/device/pci_device.c b/src/device/pci_device.c index 6075ebe..f4608fc 100644 --- a/src/device/pci_device.c +++ b/src/device/pci_device.c @@ -542,7 +542,8 @@ dev->command |= PCI_COMMAND_MEMORY; if (resource->flags & IORESOURCE_IO) dev->command |= PCI_COMMAND_IO; - if (resource->flags & IORESOURCE_PCI_BRIDGE) + if (resource->flags & IORESOURCE_PCI_BRIDGE && + CONFIG(PCI_SET_BUS_MASTER_PCI_BRIDGES)) dev->command |= PCI_COMMAND_MASTER; }