Hello Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/43569
to look at the new patch set (#2).
Change subject: 4/4 soc/intel/common/gpio_defs: Remove PAD_CFG_NF_BUF_TRIG ......................................................................
4/4 soc/intel/common/gpio_defs: Remove PAD_CFG_NF_BUF_TRIG
This macro is not correct because the RX Level/Edge Configuration (trig) and the GPIO Tx/Rx Buffer Disable (bufdis) fields in DW0 register do not affect on the pad in the native function mode.
This is part of the patch set "src/mb/*, src/soc/intel/common/gpio: Remove PAD_CFG_NF_BUF_TRIG ":
CB:43455 - 1/4 cedarisland: undo set trig and bufdis for NF pads CB:43454 - 2/4 tiogapass: undo set trig and bufdis for NF pads CB:43561 - 3/4 h110m: undo set trig and bufdis for NF pads CB:43569 - 4/4 soc/intel/common/gpio_defs: Remove PAD_CFG_NF_BUF_TRIG
Change-Id: Ic0416e3f67016c648f0886df73f585e8a08d4e92 Signed-off-by: Maxim Polyakov max.senia.poliak@gmail.com --- M Documentation/getting_started/gpio.md M src/soc/intel/common/block/include/intelblocks/gpio_defs.h 2 files changed, 0 insertions(+), 14 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/43569/2