Patrick Georgi (pgeorgi@google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9429
-gerrit
commit 13b6ebb3f41b8a523cec00a87e2f8b7974fca198 Author: Tom Warren twarren@nvidia.com Date: Thu Nov 13 13:16:28 2014 -0700
google/rush: Add I2C1 init and audio clock enable/resets
This should allow the max98090 codec to play beeps via AHUB/I2S1 thru the depthcharge sound driver.
BUG=none BRANCH=none TEST=Saw max98090 codec init signon and register dump. No sound yet.
Change-Id: I1ee0b61f5cbfe587ebd16b7dd9dce08d9d62c2c5 Signed-off-by: Patrick Georgi pgeorgi@chromium.org Original-Commit-Id: f4ee2ce3704711a9e00531b7599a1bcf194203ec Original-Change-Id: I0bc8401e76b2c80a01083ac933a39f6cd4d1b78a Original-Signed-off-by: Tom Warren twarren@nvidia.com Original-Reviewed-on: https://chromium-review.googlesource.com/229496 Original-Reviewed-by: Aaron Durbin adurbin@chromium.org Original-Commit-Queue: Mike Frysinger vapier@chromium.org --- src/mainboard/google/rush/mainboard.c | 41 ++++++++++++++++++++++++++--- src/soc/nvidia/tegra132/include/soc/clock.h | 5 ++++ 2 files changed, 43 insertions(+), 3 deletions(-)
diff --git a/src/mainboard/google/rush/mainboard.c b/src/mainboard/google/rush/mainboard.c index 8ea3f4e..bb4da19 100644 --- a/src/mainboard/google/rush/mainboard.c +++ b/src/mainboard/google/rush/mainboard.c @@ -25,6 +25,7 @@ #include <soc/clk_rst.h> #include <soc/clock.h> #include <soc/funitcfg.h> +#include <soc/nvidia/tegra/i2c.h> #include <soc/nvidia/tegra/usb.h> #include <soc/padconfig.h> #include <soc/spi.h> @@ -67,9 +68,16 @@ static const struct pad_config padcfgs[] = { PAD_CFG_GPIO_INPUT(USB_VBUS_EN1, PINMUX_PULL_UP), };
+static const struct pad_config i2c1_pad[] = { + /* GEN1 I2C */ + PAD_CFG_SFIO(GEN1_I2C_SCL, PINMUX_INPUT_ENABLE, I2C1), + PAD_CFG_SFIO(GEN1_I2C_SDA, PINMUX_INPUT_ENABLE, I2C1), +}; + static const struct funit_cfg funitcfgs[] = { FUNIT_CFG(SDMMC3, PLLP, 48000, sdmmc3_pad, ARRAY_SIZE(sdmmc3_pad)), FUNIT_CFG(SDMMC4, PLLP, 48000, sdmmc4_pad, ARRAY_SIZE(sdmmc4_pad)), + FUNIT_CFG(I2C1, PLLP, 100, i2c1_pad, ARRAY_SIZE(i2c1_pad)), };
static void setup_ec_spi(void) @@ -87,6 +95,30 @@ static void setup_usb(void) usb_setup_utmip((void *)TEGRA_USB3_BASE); }
+/* Audio init: clocks and enables/resets */ +static void setup_audio(void) +{ + /* External peripheral 1: audio codec (max98090) using 12MHz CLK1 */ + clock_configure_source(extperiph1, CLK_M, 12000); + + /* + * We need 1.5MHz for I2S1. So, we use CLK_M. CLK_DIVIDER macro + * returns a divisor (0xe) a little bit off from the ideal value (0xd), + * but it's good enough for beeps. + */ + clock_configure_source(i2s1, CLK_M, 1500); + + clock_external_output(1); /* For external MAX98090 audio codec. */ + + /* + * Confirmed by NVIDIA hardware team, we need to take ALL audio devices + * connected to AHUB (AUDIO, APBIF, I2S, DAM, AMX, ADX, SPDIF, AFC) out + * of reset and clock-enabled, otherwise reading AHUB devices (in our + * case, I2S/APBIF/AUDIO<XBAR>) will hang. + */ + clock_enable_audio(); +} + static void mainboard_init(device_t dev) { soc_configure_pads(padcfgs, ARRAY_SIZE(padcfgs)); @@ -94,14 +126,17 @@ static void mainboard_init(device_t dev)
setup_ec_spi(); setup_usb(); + + setup_audio(); + i2c_init(I2C1_BUS); /* for max98090 codec */ }
static void mainboard_enable(device_t dev) { - dev->ops->init = &mainboard_init; + dev->ops->init = &mainboard_init; }
struct chip_operations mainboard_ops = { - .name = "rush", - .enable_dev = mainboard_enable, + .name = "rush", + .enable_dev = mainboard_enable, }; diff --git a/src/soc/nvidia/tegra132/include/soc/clock.h b/src/soc/nvidia/tegra132/include/soc/clock.h index f0d05e1..e62e0aa 100644 --- a/src/soc/nvidia/tegra132/include/soc/clock.h +++ b/src/soc/nvidia/tegra132/include/soc/clock.h @@ -187,6 +187,9 @@ enum { PLLE = 7, PLLA = 8, UNUSED = 100, + UNUSED1 = 101, + UNUSED2 = 102, + UNUSED3 = 103, };
#define CLK_SRC_DEV_ID(dev, src) CLK_SRC_##dev##_##src @@ -221,6 +224,8 @@ enum { CLK_SRC_DEVICE(SDMMC3, PLLP, PLLC2, PLLC, PLLC3, PLLM, PLLE, CLK_M), CLK_SRC_DEVICE(SDMMC4, PLLP, PLLC2, PLLC, PLLC3, PLLM, PLLE, CLK_M), CLK_SRC_DEVICE(UARTA, PLLP, PLLC2, PLLC, PLLC3, PLLM, UNUSED, CLK_M), + CLK_SRC_DEVICE(i2s1, PLLA, UNUSED, CLK_S, UNUSED1, PLLP, UNUSED2, CLK_M), + CLK_SRC_DEVICE(extperiph1, PLLA, CLK_S, PLLP, CLK_M, PLLE, UNUSED, UNUSED1), };
/* PLL stabilization delay in usec */