Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43310 )
Change subject: soc/amd/picasso: Add dummy spinlock for psp_verstage ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/43310/2/src/soc/amd/picasso/psp_ver... File src/soc/amd/picasso/psp_verstage/include/arch/smp/spinlock.h:
https://review.coreboot.org/c/coreboot/+/43310/2/src/soc/amd/picasso/psp_ver... PS2, Line 15: #define boot_cpu() 1
Just want to point out that this is a copy of an existing file in the tree.
The questions that appeared, only after submission, indicate the file you forked from was alredy borked. And there is also the potential file-name collision (dependency of include path order) that is not desireable.
The quartet AD, FS, JW and KM have authored, reviewed and submitted some 100-200 changes that today enables one to build stages with different ARCH. None of us were added as reviewers.
If the 3 +2 reviews needed to submit should be restricted to only fixing breakages in the coreboot master build, maybe the rule should be updated so that everyone else understands that expectation. Currently, that's not stated, so if that's the expectation, nobody else knows it.
Indeed, and I have requested this for todays meeting agenda. The "3x +2 fast-tracking" guideline wasn't really discussed or argumented much when it first appeared.
https://mail.coreboot.org/pipermail/coreboot/2015-October/080557.html
IMHO the spirit then was it has to be something trivial to fast-track anything, the group with +2 rights back in 2015 may have been more restricted too.
Since this only fixes build with CMOS_POST=y, which no board seems to select by default, what was the motivation for fast-tracking it at all?